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I designed the circuit using Cyclone V's 5CEBA7, confirmed its operation, and observed that it consumes around 380mA with a 12V power supply. After confirming that 5CEFA7 can be a pin-to-pin replacement for 5CEBA7, I replaced the device in the same circuit and tested it.
Before loading the code into the 5CEFA7 device, the voltage and current were 12V and 110mA, respectively. After changing to the 5CEFA7 device and verifying the operation with newly built code, it operated normally. However, the power consumption increased to 12V and 680mA.
When I supplied power separately to each FPGA, the current for the 3.3V power supply reached 800mA.
After resetting each FPGA, the current for 5CEBA7 decreased to 12V and 150mA, but for 5CEFA7, it decreased to 12V and 510mA, still showing a high current value.
I would appreciate an explanation for this situation.
Please help a beginner...
Before loading the code into the 5CEFA7 device, the voltage and current were 12V and 110mA, respectively. After changing to the 5CEFA7 device and verifying the operation with newly built code, it operated normally. However, the power consumption increased to 12V and 680mA.
When I supplied power separately to each FPGA, the current for the 3.3V power supply reached 800mA.
After resetting each FPGA, the current for 5CEBA7 decreased to 12V and 150mA, but for 5CEFA7, it decreased to 12V and 510mA, still showing a high current value.
I would appreciate an explanation for this situation.
Please help a beginner...
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Hi,
I would like to first understand, the methodology and steps you followed to ensure that the devices and the Quartus design are pin compatible.
Can you please help me understand that?
Regards
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Hello,
I've downloaded and compared the Excel files for the pinout of each device on the Intel website. Every detail, including pin number, name, function, power bank, current, and input/output direction, is identical. The only difference between the two devices is the presence of the hardware memory controller.
Thank you.
I've downloaded and compared the Excel files for the pinout of each device on the Intel website. Every detail, including pin number, name, function, power bank, current, and input/output direction, is identical. The only difference between the two devices is the presence of the hardware memory controller.
Thank you.
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Hello,
Measuring from 12V power rail can't directly translate to FPGA power consumption.
Could you please probe the power rails below?
- VCC
- VCCIO
To confirm the observation?
And do you have the PPA(Power Play Analyzer) report generated from both w/ memory and w/o memory for comparison?
regards,
Farabi
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As we did not get any further response on this case, I am setting the case to closure. However, it will still be open for the community members to comment on.
Regards
