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Cyclone V Resource Property Editor Questions

DBart1
Beginner
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I have having difficulty understanding the chip planner resource property editor view of the ALM in a Cyclone V . I have read the Cyclone V handbook section on the LAB/ALMs but that does not seem to provide enough detail to explain the resource property editor view. I had a few questions and would greatly appreciate if anyone could help me understand this better.

 

  1. In the resource property editor view of the ALM it shows that all of the inputs are inverted? I didnt see that mentioned anywhere in the handbook and the diagram in the handbook does not show this
  2. The top 2 3-Input LUTs are both names F2 in the resource property editor. As there is only 1 LUT mask listed for F2 I assume these have the same SRAM configuration memory bits that define the function meaning they implement the same function. However it appears they also have identical inputs which wouldnt make sense to be performing the same function on the exact same inputs so I assume I am misunderstanding this somehow. Additionally the LUTMask is 4 hex digits as opposed to the 2^3=8 bits required to define a 3 input function. Can someone explain is the function of the 3 input LUTs both named F2 actually performing different functions (ie one using first 2 hex symbols of LUTmask and the other using the other 2 hex symbols?) Or does this mean something else entirely that I am missing.

 

 

Again I have attempted to understand it from the user guides, prior posts but I haven't been able to find this information anywhere. If there is somewhere this is explained I would appreciate if someone could point me to that.

 

Thanks for any assistance!

 

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sstrell
Honored Contributor III
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A screenshot of what you're seeing would help.

 

Also, is this just for your own understanding or are you wanting to make ECO changes using the RPE?

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KhaiChein_Y_Intel
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Hi DBart1,

 

Could you provide some screenshot of the view described above?

 

Thanks.

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DBart1
Beginner
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The attached screenshot shows an example of what I am seeing.

 

As can be seen on the inputs there is a ! symbol implying they are inverted.

 

In the upper right in the screenshot there is asingle LUTMask listed for the F3 . Two LUTs appear to be labeled F3 in the diagram though So my question is:

 

The top 2 3-Input LUTs are both names F3 in the resource property editor. As there is only 1 LUT mask listed for F3 I assume these have the same SRAM configuration memory bits that define the function meaning they implement the same function. However it appears they also have identical inputs which wouldnt make sense to be performing the same function on the exact same inputs so I assume I am misunderstanding this somehow. Additionally the LUTMask is 4 hex digits as opposed to the 2^3=8 bits required to define a 3 input function. Can someone explain is the function of the 3 input LUTs both named 3 actually performing different functions (ie one using first 2 hex symbols of LUTmask and the other using the other 2 hex symbols?) Or does this mean something else entirely that I am missing.

 

Thanks

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KhaiChein_Y_Intel
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Hi DBart1,

 

Here is the FPGA Architecture White Paper for your reference:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/wp/wp-01003.pdf

 

The masks reflects the hardware format which has active low data inputs rather than the logical view you see in Resource Property Editor.

 

Thanks.  

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