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Is there a avalon streaming i/f to axi i/f for the cyclone V FPGA series that can be used?
Currently I am trying to figure out a way to do it seems like there is something in the platform designer that can be custom generated but not 100% sure, is there someone who has already tried this before?
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No. The streaming interfaces (Avalon and AXI) cannot be connected to each other and they can't be connected to either Avalon or AXI memory mapped interfaces. The best solution might be to use something like a memory or a FIFO to bridge between the interface standards.

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Got it so i would need 2 controller AXI and avalon on either side of FIFO and manage the data stream.
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I agreed with sstrell and I believed that you have found an answer to your question.
With that, I will now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.
Best Regards,
Richard Tan
p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.

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