I'm sorry for the long post, but I'm hitting a wall with this problem for weeks.
I've developed a custom board with a 5CEFA4 Cyclone V device. Here's some relevant info for the FPGA configuration:
- the device uses a MT25QL256ABA8E12-1SIT flash device (EPCQ compatible) with ASx4, powered by VCCPGM=3.3V;
- there's a NIOSII processor with a Serial Flash Controller II Intel FPGA IP (@50MHz) for accessing the flash;
- all the power supplies ramp up in about 5ms. They are sequenced and 1ms apart (not precisely, with RC delays). At turn off, they ramp down in 10-100ms (depending on the supply)
- there's an RGB led connected to I/O pins through BJTs. If the FPGA is in POR (pin tri-stated) the led is off. If it's configuring the led is white (caused by the internal weak pull-ups). If it's configured with firmware running it's green (driven by fabric+FW);
- MSEL pins are correctly configured for ASx4 standard mode (100ms delay);
- I can't access the flash signals on the board;
- I can successfully write in the flash with a JIC file. At startup the FPGA loads the bitstream and then loads the firmware in an external DDR3 memory using the Intel bootcopier.
The problem is that the bitstream is not loaded at every power cycle! Very weird.
If the power supply is off for more than 10s and I turn it on, the leds stay off and the bitstream is not loaded. I think the FPGA can't exit POR, but I can't understand why.
If I turn the power off and then on again in less than 7-10s the FPGA loads everything correctly.
If I short nCONFIG to ground when the FPGA is not configured and then release it, the configuration happens correctly.
Do someone has any clues on what I'm doing wrong?
I just did another test:
with the power off for >10s, if I turn it on keeping nCONFIG low, the led turn on (fpga enter/prepare for config) after 5 seconds. If I release it the FPGA config correctly.