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Development kit selection for newbie

Altera_Forum
Honored Contributor II
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Hello, guidance needed: 

 

I am about to buy my first FPGA development kit and I think that I am choosing between the terasIC DE1-SoC Board and their Cyclone V GX Starter Kit: 

 

http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=205&no=836 (DE1-SoC) 

http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=167&no=830 (Cyclone V GX) 

http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=53&no=30 (DE-2) 

 

Basically, I want a board similar to the DE-2 35 board I have used at the university, but I want to be able to use the current and at least a few future versions of Quartus Lite. 

 

My main question is whether the SoC board should be seen as an FPGA board with additional features (the ARM dual-core) or if these two boards are essentially different. Is it possible to use the SoC board in the same way as you would use a non-SoC (non-ARM-based) board? Sorry for not being able to formulate good questions. Please expand on your answer where you see fit. 

 

Grateful for yout input. Thanks in advance. 

 

Cheers 

 

Niclas
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Altera_Forum
Honored Contributor II
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It depends what you want to do with it. Do you have any projects in mind? 

Basically the SoC gives you an ARM, but smaller FPGA fabric. The non-SOC board gives you access to transceivers and a larger FPGA. 

 

What is your goal?
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Altera_Forum
Honored Contributor II
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Currently I don't have a project in mind. My experience from FPGAs is limited to two university courses in embedded systems (multi-core NIOS II) and one VHDL course. At this point I want a good starter kit that I won't outgrow quickly and that will be supported by the latest Quartus Lite release for a few more years. The DE-1 SoC or the Cyclone V GX boards are in a reasonable price and feature range, but I am open to other suggestions. 

 

Looking at the user manual's block diagram (p10), it seems that the device is partitioned so that some peripherals (e.g. the SDRAM) belong to the ARM (HPS) partition, thus enforcing a design that could be described as "an ARM with an FPGA add-on". It would make it difficult to do multi-NIOS-core designs, as they would not have direct access to SDRAM(?). On the other hand, the SoC has support for OpenCL (and embedded Linux via Yocto?). And, if you are only interested in <= 2 cores, the ARM seems to be far better than the NIOS cores. Please correct or expand. 

 

http://www.terasic.com.tw/cgi-bin/page/archive_download.pl?language=english&no=836&fid=3a3708b0790bb9c721f94909c5ac96d6 (DE-1 SoC user manual) 

 

BR /Niclas
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Altera_Forum
Honored Contributor II
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If you want a SoC - you might be better off looking at the Xilinx Zynq range. Xilinx are way ahead of Altera when it comes to SoCs, and all of their IP supports industry standard AXI (rather than the proprietary Avalon). Altera have AXI/Avalon converters (not for streaming though!!) but it's just more logic that wouldnt be needed over at Xilinx. Altera have now pretty much dropped SoCs - having always pointing you at rocketboards.org if you want any linux support. They are pushing OpenCL harder, which is mostly aimed at processor controller + FPGA co-processor, which will tie in nicely to the fact that Intel is buying Altera (pretty sure you'll see FPGA/x86 dev boards at some point).

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