Device can support SignalTap and pin to pin compatible with MAXV

[Altera_Forum]

Hi, 

 we use MAX V series for our product, however, when I trying to debug it, I found out it does not support the SignalTap, the part number is 5M240ZT100C5N. So, I'm wondering is there any other CPLD/FPGA can support SignalTap and pin to pin compatible with MAXV (5M240ZT100C5N).  Thanks

[Altera_Forum]

Believe you are out of luck. That part is a CPLD in a TQ100 flat pack. There are no FPGA (req'd to support signaltap) in that package. 

 Depending upon your device utilization (logic and I/Os) you could implement your own custom version of a SignalTap-like logic analyzer capability on some spare I/Os. It is not that hard to do, logic wize, and it is the way it was done in the olden days anyway before capability like SignalTap existed. Folks rolled their own debug logic.

[Altera_Forum]

Consider that MAXV has no RAM resources and can store exactly one bit per LE. 

 More promising to make an adapter PCB connecting a MAX10 in U169 package on top of the TQFP100 footprint.