Does GPIO output of DE0 nano depend on the load impedance

[yashwanth24]

I am interfacing a NOT gate 7404 IC to GPIO of DE0 nano . Output of GPIO is driving the input of NOT gate. Will the input impedance of NOT gate have any  effect on the transmitting value at the GPIO pin.

[Farabi]

Hello,

Please make sure the single-end IO standard/voltage level of the IC is same as GPIO.

regards,

Farabi

[sstrell]

FYI set the I/O standard and voltage in the Pin Planner or the Assignment Editor in Quartus.

[AqidAyman_Intel]

Hello,

I wish to check with you, do you have any more concern on this?

Regards,

Aqid

[yashwanth24]

I have done the assignment in pin planner and i have set the standard as 3.3 V and the 7404 IC supports this rating.  Still the problem exists

[yashwanth24]

Also I want to Interface the output from GPIO to a input of LPF made with resistor and capacitor. Which standard of I/O logic should be  chosen while interfacing?

[AqidAyman_Intel]

As we do not receive any response from you on the previous question/reply/answer that have been provided, please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

[yashwanth24]

i have performed all those settings , still i cant drive the IC required for me