Does de-assertion of DEV_OE affect acces to JTAG port functions?

[Nikolay_Rognlien]

In a given scenario with Max10 project where "Enable Device-wide output enable (DEV_OE)" is Enabled;

Does de-assertion of DEV_OE affect acces to JTAG port functions?

Can you reprogram contents in CFM0 location if DEV_OE is pulled low?

[YuanLi_S_Intel · Accepted solution]

Hi,

DEV_OE doesnt affect the configuration. Enable "Enable Chip-Wide Output Enable" will change the functionality of this input pin to override all tri-states on the device. When this pin is driven low, all I/O pins are tri-stated. When this pin is driven high, all I/O pins behave as programmed.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/dp/max-10/PCG-01018.pdf (Page 6)

Thank You