I've developed a custom PCB which includes the EPCQ128 & the Cyclone IV, but I cannot find any details (reference design, gerber files, etc) which give details of how to properly layout theses given the EPCQ device will be programmed by AS mode through a USB Blaster, or USB Blaster II device.
How does the trace lengths need to be routed in length, given there are some direct connections from the input connector to the FPGA, from the FPGA to the EPCQ, and from the connector to the EPCQ. Basically, there is a T-Topology with the 4 main lines to the memory.
Are there any resources available which can direct me on this?
I'm unaware of any design guidelines specifically for this. Keep things as short as possible and you should realise a working solution. The topology is pretty tolerant and forgiving as far as programming and subsequent configuration is concerned. It'll put up with some generous trace lengths too.
If you're still concerned I recommend you consider JTAG indirect Configuration. This removes any need for T paths in the copper, allowing you to program the EPCS/EPCQ from the FPGA, via JTAG.
Have a look at: