Enabling Transceiver Reverse Serial Loopback Not Working

[Altera_Forum]

I am trying to enable reverse serial loopback on an Arria V chip. To do this, I tried following chapter 16 of the altera transceiver phy ip core user guide (http://www.altera.com/literature/ug/xcvr_user_guide.pdf). My understanding is that I need to write to the PMA control registers using the reconfiguration controller. Page 522 shows how to perform the write, with Table 16-10 on page 494 giving the address of the reverse serial loopback (post CDR).  

 However when I tried to implement on our chip, nothing happens. I attached the SignalTap output. It shows that I try to write the corresponding values to the corresponding addresses as indicated by the example, and then trigger the write command at the end. However as you can see, there is no communication on the lines connecting the reconfiguration controller to the transceiver.  https://www.alteraforum.com/forum/attachment.php?attachmentid=7865   I am assuming that I am missing something simple. Any suggestions about what it could be? I also attached a screenshot of the way I setup the reconfiguration controller. The transceiver is a Custom PHY IP block configured as 4 32-bit duplex channels running at 6 Gpbs. I have tested that all of the channels can send and receive correctly.  https://www.alteraforum.com/forum/attachment.php?attachmentid=7866