Hi,
I tried to do a pass through logic for I2C . i have master and slave out side fpga and i need to connect that through fpga. SDA, SCL both are inout pins. So i added a tri state logic for this operation .The inout pin connect with a pin having I/O standard 3.3v LVCMOS. While compiling i got following errors.Can you please help me to fix this. Here with i am attaching the verilog code also
Error(20783): Open Drain option is set to 'ON' for pin I2C_AUDIO_SDA~pad, but setting is not supported by I/O standard 3.3-V LVCMOS.
code
inout I2C_AUDIO_SDA;
inout J_I2C4_DAT;
reg J_sda_inreg;
reg A_sda_inreg;
always @(posedge fclk)
begin
J_sda_inreg <= J_I2C4_DAT;
end
assign I2C_AUDIO_SDA = (!J_sda_inreg) ? 1'b0 : 1'bz;
always @(posedge fclk)
begin
A_sda_inreg <= I2C_AUDIO_SDA;
end
assign J_I2C4_DAT = (J_sclk_inreg & !A_sda_inreg) ? 1'b0 :1'bz;
