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Hi,
When i want to flash Stratix V board with SOF file i get this error. How can i ground Chip Enable pins? i did it in my verilog code like 1'b0 ,but it did not work. how can we ground them physically?Link Copied
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Hi,
--- Quote Start --- When i want to flash Stratix V board with SOF file i get this error. How can i ground Chip Enable pins? i did it in my verilog code like 1'b0 ,but it did not work. how can we ground them physically? --- Quote End --- It is a power issue. Do you mean nce(chip enable) pin not connected to ground? Then you need to have hardware modification. Best Regards, Anand Raj Shankar (This message was posted on behalf of Intel Corporation)- Mark as New
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Yes, nCE. What kind of power issue? i use the altera adapter and it is not connected to PCIE.
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Hi,
I meant, If the JTAG configuration with .sof file failed, thus it is a power issue. You can check the FPGA device POR monitored power supplied if those power supplies are ramped up to the appropriate voltage level according to the device datasheet and are stable throughout the operation than programming will be succesful. Refer page No:324 https://www.altera.com/en_us/pdfs/literature/hb/stratix-v/stx5_core.pdf 1. Are you using development kit or custom board? Best Regards, Anand Raj Shankar (This message was posted on behalf of Intel Corporation
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