Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Errors in Arria 10 device


I have a design using 10AX057N4,and about 70% ALMs are used. In a low-level module in the design , I define one single-bit input port to constant "1", below module is for example not the real design:

 module_aaa     inst0


.a                        (a),                //input port a

.b                       (1'b1),          //input port b, reference to constant 1

.c                        (c)                //output c


and for a very low probability , I can find that port b will physically be constant '0' .

Why?  what cause  this error? 


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2 Replies

Hi @XG_Kang 


It's hard to determine what really cause the error. What I can suggest is try to simulate the design for design functionality check. 

If the design behave as expected, then you may try to signal tap the device to further debug on this. 

It could be hardware related issue, try to swap with another device and see if the issue persists.


Best Regards,

Richard Tan

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hi @XG_Kang 


We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Best Regards,
Richard Tan

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos. 

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