Fun or no fun with Cyclone V Integrated ARM processors?

[Altera_Forum]

Hello, the following I have posted on another Forum but haven't receive many responses. So, I am going to post it here.  

 I've been reading about the new Cyclone V and it's integrated ARM processor and wanted to ask if anyone would share their comments about the device. I would like to know how easy is it to get things going on the processor and about the tools you must use. Is it just easier to stick with a traditional microprocessor or DSP?  Thanks and I appreciate all comments.  Respectfully, joe

[Altera_Forum]

Hi. The SOC C5 devices arnt out yet, so you wont get any feedback on that front yet. But there are similar xilinx parts. 

Whether its better will depend how you want to use it. The FPGA version allows you to heavily customise the interface, and add custom co-processors, but with the added cost of power and money.

[Altera_Forum]

SoC devices are out, they have been populated on various boards including the CV SoC dev kit.

[Altera_Forum]

--- Quote Start ---  SoC devices are out, they have been populated on various boards including the CV SoC dev kit.  --- Quote End ---    Thanks! I'll wait a few months and ask again.

[Altera_Forum]

To answer your question in the original post, the tools should be similar to other microprocessors. For example ARM's DS-5 is offered to software developers so that they can stick to tools that they are most likely famiilar with. The biggest difference really is that unlike an ASIC you have an FPGA fabric at your disposal to build any SoC system you like. So various hardware and software tools are offered to make designing towards these devices possible to cope with the flexible hardware at their disposal. 

 I would take a look at this site to see some of the early work already accomplished with these SoC devices: http://www.rocketboards.org/

[Altera_Forum]

I have used both the Cyclone V SOC kit we received several months ago through an Arrow SOC class (made by terASIC) 

and the Zynq platform.  In General, I like them better than the standard, DSP/FPGA through EMIF or some similar bus structure. You have direct access to the AXI/APB bus, so you bus interface may be much faster. The speed of the bus becomes less of an issue if you use PCIe. but it has more overhead requirement then AXI/APB  That being said, what they lack is a good graphics solution, so if you have a a high resolution screen, (or multiple displays), you are using a lot of your FPGA fabric just for the video out.   If high quality video is a requirement, then I still prefer the external solution. We have many IT OMAP w/FPGA designs under our belt, and currently have a iMX6 + Cyclone V design nearing completion, and a Zynq-> ASIC design nearing completion. (I'm a consulting working with multiple companies).  The OMAP is nice, since you can have a dedicated DSP doing the real time number crunching and the ARM doing OS stuff. But TI is currently a little behind the times on performance..(At least for chips non Tier 1's can get) The IMX6 is a good part, especially for graphics and have 1-4 ARM A9 cores. so you can scale into the part that fits your requirements.  Pete

[Altera_Forum]

--- Quote Start ---  I have used both the Cyclone V SOC kit we received several months ago through an Arrow SOC class (made by terASIC) and the Zynq platform.  In General, I like them better than the standard, DSP/FPGA through EMIF or some similar bus structure. You have direct access to the AXI/APB bus, so you bus interface may be much faster. The speed of the bus becomes less of an issue if you use PCIe. but it has more overhead requirement then AXI/APB  That being said, what they lack is a good graphics solution, so if you have a a high resolution screen, (or multiple displays), you are using a lot of your FPGA fabric just for the video out.   If high quality video is a requirement, then I still prefer the external solution. We have many IT OMAP w/FPGA designs under our belt, and currently have a iMX6 + Cyclone V design nearing completion, and a Zynq-> ASIC design nearing completion. (I'm a consulting working with multiple companies).  The OMAP is nice, since you can have a dedicated DSP doing the real time number crunching and the ARM doing OS stuff. But TI is currently a little behind the times on performance..(At least for chips non Tier 1's can get) The IMX6 is a good part, especially for graphics and have 1-4 ARM A9 cores. so you can scale into the part that fits your requirements.  Pete  --- Quote End ---     Pete,  Is the iMX6 a Floating point processor or Fixed point processor?  joe

[Altera_Forum]

--- Quote Start ---   Is the iMX6 a Floating point processor or Fixed point processor?   --- Quote End ---    The iMX6 is a freescale part, It's ARM A9 based with the floating point NEON extension.. http://www.freescale.com/webapp/sps/site/taxonomy.jsp?code=imx6x_series  Not as powerful as number cruncher as some DSP solutions but I tend to do most of the heavy DSP in the FPGA anyway.   The boundary devices dev board is a good get your feet wet board to play with it. But is not ideal for interfacing with an FPGA board.. (It has interfaces to do it, but it's not standard connectors. But hey, it's just $199. http://boundarydevices.com/products/nitrogen6x-board-imx6-arm-cortex-a9-sbc/  They also have a SOM, OK for PCIe development, but the flash interface is not available. I haven't used that.  NOVSOM has a iMX6 SOM that exposes everything. It's a small company however, and they are stingy with schematics. And they really crippled their Ethernet solution on the devboard they provide with it. (They use and external spi-ethernet instead of the internal MAC). It's a trade off they did for USB connectivity, but in my opinion was a poor one.  (You can create your own ethernet daugher card and re-enable the internal mac, but it's a pain).  Pete

[Altera_Forum]

Hi Joe, 

 I recently got one of the Cyclone V SoC boards (First the Helio kit, then the LCD to make it a "Helio View"): http://www.macnica-na.com/web/americas/heliokit  Here's what I found.. from a tools perspective, if you're used to microcontrollers (like PICs, etc.) there's a definite learning curve because you pretty much don't want to run the SoC without an operating system. That said, if you're used to writing Linux/embedded Linux, the whole toolchain and debuggers are there. Because there's an OS, you have to play a few games to directly access peripherals that you build in the FPGA fabric because the addresses are obscured (you can get around this pretty easily and expose the physical address space if you don't want to write drivers).  Based on my experience with the kit (it has both HDMI in/out and an 800x480 LCD), unless you're doing really high-end, high resolution graphics, the dual A9 has plenty of horsepower. The demo set that comes with the Helio View (uses DirectFB, which is basically a thin library that allows you to render graphics) shows this pretty well. I'm actually working on integrating it with some of the Video IP suite to do on-screen display over processed video, and the VIP suite does all the heavy lifting for the video while the A9 does the graphics rendering (with the benefit of Linux). Looked at the I.MX for this sort of thing, too, but since I'm more used to the intuitive flow of the VIP suite, I went FPGA. The A9 really helps vs. NIOS (embedded processor) because it has the horsepower to get the graphics rendering done.

[Altera_Forum]

Hi All, 

 I have used Cyclone V Soc using its single core (Cortex-A9). It is really fun. When it came to use its second core, I have faced troubles (honestly). The second core does not execute any instruction when the first core send an IPI for task scheduling. Second core is stopped at instruction "S:0xFFFF0100 : LDR sp,[pc,#-164] ; [0xFFFF0064] = 0xFFFFE6A4". So in reality the first core bear all the load. The same code is working fine on i.MX6 on 2 cores. What could be the difference?  P.S. I am using DS-5.

[Altera_Forum]

fpgajeg, 

 Hi, thanks for your comments. Quick question, it is required that people use an OS when using the Cyclone V SoC?   joe

[Altera_Forum]

nrasheed, 

 Hi, thanks for your comments on the Cyclone V. I have not used that device but some of my co-worker intend to. A few questions for you. Are you using an OS on the Cyclone? Second, can you configure the Cyclone to only use one core and power down the other core, I'm just curious if it is possible? Last, how are the Altera tools for development?  thanks, joe

[Altera_Forum]

Hi Joe: 

 No it is not "Required" to use an OS, but highly recommended to get the full capabilities of the SMP system.  You can definitely us just one of the 2 CPU's. I'm not positive is the second core in this case can be totally powered down. It's can be held in reset however.   The tools are ok, probably not the best, but much better than they were a few years back. I'm an FPGA guy however, so the CPU is not my main area of focus.  For the FPGA tools, I like the Altera tools much better than the Xilinx tools as far as system integration.  Pete