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Generate patterns through CPLD(MAXII)?

Altera_Forum
Honored Contributor II
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I'm new to FPGA/CPLD. Could any one help me? 

I'm wondering if I can use CPLD/FPGA to generate some patterns to output pins? This is for some simple test purpose. 

 

For example, under 50MHz clock, to generate pattern as "0011110000111100101010...." 

 

As I know, the CPLD/FPGAs are to be programmed as logic functions.  

Appreciate for the answers.
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Altera_Forum
Honored Contributor II
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Hi, Dave, 

I don't get it. Why I need an ADC for analog sensing?
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

 

I don't get it. Why I need an ADC for analog sensing? 

--- Quote End ---  

 

 

You said you wanted to measure Idd/power consumption? How are you planning on getting that into the CPLD/FPGA? They only speak digital. 

 

Cheers, 

Dave
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Altera_Forum
Honored Contributor II
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I think that I can measure that by external power supply.  

That could reduce the complexity to new FPGA users like me.
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Altera_Forum
Honored Contributor II
204 Views

 

--- Quote Start ---  

I think that I can measure that by external power supply.  

That could reduce the complexity to new FPGA users like me. 

--- Quote End ---  

If you want to measure the power used by a microcontroller in deep sleep modes, and during operation, you will need an accurate measurement setup, i.e., your power supply must be very nice ($$$). If you use an analog-to-digital converter and a microcontroller and some voltage and/or reference circuits, you can calibrate your circuit, and then use that to measure the micro power consumption. 

 

So 'complexity' is required, it just depends where you want it and whether you want to pay for it. 

 

Cheers, 

Dave
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Altera_Forum
Honored Contributor II
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It's attractive to me.  

How can I realize it? 

1. Which MCU is recommended at which platform (EVB)?  

2. How to utilize it's ADC for power measurement? 

 

Thanks.
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Altera_Forum
Honored Contributor II
204 Views

 

--- Quote Start ---  

It's attractive to me.  

How can I realize it? 

1. Which MCU is recommended at which platform (EVB)?  

 

--- Quote End ---  

Any of the ARM processor cores are very good. 

 

For example, ST just released a ARM core with a single-precision floating-point unit (TI and Freescale also have similar parts). This STM32 kit was being given away last week, but it looks like the link for the free kit is gone now; 

 

http://www.st.com/internet/evalboard/product/252419.jsp 

 

However, the board is $20 

 

http://parts.digikey.com/1/parts/2484058-eval-kit-stm32f-discovery-stm32f4discovery.html 

 

So its close to free :) 

 

 

--- Quote Start ---  

 

2. How to utilize it's ADC for power measurement? 

 

--- Quote End ---  

You need to figure out what is the minimum current you need to measure, and at what accuracy. You then need a current sensing circuit and an amplifier (op-amp) to increase the signal level. Sometimes the current-sensing circuit is built using op-amps. 

 

If you have never used op-amps, read the TI reference book from Ron Mancini called "Op-amps for everyone"; 

 

http://www.ti.com/lit/an/slod006b/slod006b.pdf 

 

eg., p193 Chapter 12 Instrumentation: Sensors to A/D Converters. 

 

There are 'current sensor' circuits that incorporate the op-amps and logic. You'll have to look around TI, Analog Devices, Linear Technologies, etc web sites. 

 

Cheers, 

Dave
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Altera_Forum
Honored Contributor II
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Dave,  

Before going that far, I need to generate serial patterns for some purpose. 

How can I generate serial patterns? 

 

Thanks!
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Altera_Forum
Honored Contributor II
204 Views

 

--- Quote Start ---  

 

Before going that far, I need to generate serial patterns for some purpose. 

How can I generate serial patterns? 

 

--- Quote End ---  

With a parallel to serial shift register? 

 

Look at the documents on this page: 

http://www.ovro.caltech.edu/~dwh/carma_board/ (http://www.ovro.caltech.edu/%7edwh/carma_board/

 

http://www.ovro.caltech.edu/~dwh/carma_board/fpga_configuration.pdf (http://www.ovro.caltech.edu/%7edwh/carma_board/fpga_configuration.pdf

http://www.ovro.caltech.edu/~dwh/carma_board/at84ad001b_tests.pdf (http://www.ovro.caltech.edu/%7edwh/carma_board/at84ad001b_tests.pdf

http://www.ovro.caltech.edu/~dwh/carma_board/ad9956_tests.pdf (http://www.ovro.caltech.edu/%7edwh/carma_board/ad9956_tests.pdf

 

They all have examples of devices with serial interfaces, along with the FSM designs. Just copy something in there. 

 

If you want to generate a long sequence of random bits, then use an LFSR: 

 

http://www.ovro.caltech.edu/~dwh/correlator/pdf/lfsr_tutorial.pdf (http://www.ovro.caltech.edu/%7edwh/correlator/pdf/lfsr_tutorial.pdf

 

These sequences are not really random, in that they follow a well defined pattern. You can generate an LFSR serial pattern, capture the first few bits and use that as a seed to a receiver-side LFSR checker. This is how the Altera pattern-generator and pattern-checker cores work. 

 

Cheers, 

Dave
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Altera_Forum
Honored Contributor II
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Thanks, Dave. 

I'd like to generate serial patterns from laptop, not parallel input. Can I do that through LFSR?
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Altera_Forum
Honored Contributor II
204 Views

 

--- Quote Start ---  

 

I'd like to generate serial patterns from laptop, not parallel input. Can I do that through LFSR? 

--- Quote End ---  

 

 

Parallel/serial, it doesn't matter. Its just bits. 

 

Cheers, 

Dave
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Altera_Forum
Honored Contributor II
204 Views

I read through the articles and found that it's too difficult to me. 

Any starting materials that I can refer to generate serial patterns? 

 

Thanks!
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Altera_Forum
Honored Contributor II
204 Views

 

--- Quote Start ---  

I read through the articles and found that it's too difficult to me. 

Any starting materials that I can refer to generate serial patterns? 

 

--- Quote End ---  

 

 

Download the Byteblaster.zip file I posted here. There is an SPI shift register in there. It has a Modelsim simulation. Run it. Read it. Try to understand it. 

 

http://www.alteraforum.com/forum/showthread.php?t=32434&page=3 

 

Cheers, 

Dave
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Altera_Forum
Honored Contributor II
204 Views

Dave, 

I learned with the lpmshiftreg mega function but still got problems. 

I attached the simulation waveform. 

 

Basically, the serial output have no response after CLK enabled when d[7..0] was put as data input. 

 

Do you know why? 

 

Thanks! 

 

Cliff
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Altera_Forum
Honored Contributor II
204 Views

Hi Cliff, 

 

--- Quote Start ---  

 

I learned with the lpmshiftreg mega function but still got problems. 

I attached the simulation waveform. 

 

Basically, the serial output have no response after CLK enabled when d[7..0] was put as data input. 

 

Do you know why? 

 

--- Quote End ---  

 

 

Can you please upload a testbench for the device. That'll make it clearer whether you are using it correctly. If you need an example testbench to get you started, use the one on this thread: 

 

http://www.alteraforum.com/forum/showthread.php?t=32386 

 

Cheers, 

Dave
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Altera_Forum
Honored Contributor II
204 Views

Hi Dave,  

I tried lpmshiftreg in Megafunction of QuarterII and it works finally. Thanks for your patience replying me so many questions.  

 

Cliff
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Altera_Forum
Honored Contributor II
204 Views

Hi Cliff, 

 

--- Quote Start ---  

 

I tried lpmshiftreg in Megafunction of QuarterII and it works finally. 

 

--- Quote End ---  

 

 

Great! But take the time to look at the Modelsim simulation example too. Its a very powerful tool, and worth learning. 

 

 

--- Quote Start ---  

 

Thanks for your patience replying me so many questions.  

 

--- Quote End ---  

 

 

You're welcome. 

 

Cheers, 

Dave
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