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HPS access to SDM for internal TDS readings

Scotty2
New Contributor I
1,449 Views

Hi, 

 

I am trying to read the Stratix 10 internal TDS from HPS, but I want to do this without loading a bitstream that contains the Mailbox IP block or the Temperature Sensor IP block. I am booting with "HPS first" mode from the SD-CARD and therefore have the FPGA I/O ring configured at boot, but no other bitstream is loaded after booting into Linux (HPS).

 

I understand that the SDM has access to the temperature sensors (see attached image), but I do not understand how HPS can interact with the SDM directly.

There are mapped memory ranges in the HPS such as "SDMExternal_Master_mailboxMailbox_to_SDMMailbox_From_SDMMailbox_stream", how may one use these to query information from the SDM? For example, a 'C' program on HPS that writes and reads to the memory mapped registers to get the temperature value from the FPGA fabric from the SDM.

 

Thank you for the help!

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Scotty2
New Contributor I
1,173 Views

Hi, 

 

yes I got it to work on stratix 10 with linux 5.15.30-lts and uboot 2022.01, ATF 2.6.1

 

The process is to enable the HWMON in the defconfig of the kernel (CONFIG_SENSORS_SOC64=y) and add a new node to the device tree that contains the labels and register address of the ADC channels that is then readout by the SDM. 

 

look at 5.15.70-lts for some documentation and an example of adding these nodes to the device tree. You may also look at the patches made to this tag for the HWMON and apply them yourself if needed.

 

After doing that, booting into HPS in HPS first mode without loading any bitstreams, you can read the voltages and the die temperature with a system call at " /sys/class/hwmon/hwmon0/[<name>_label or <name>_input> "

 

the values are already multiplied by 1000 in the driver.

 

Thanks

 

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JingyangTeh
Employee
1,386 Views

Hi


Sorry for the late response.

I am Jingyang and I am assigned to the case.

Please give me sometime to go through case and I will get back to you as soon as possible.


Regards

Jingyang, Teh


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Scotty2
New Contributor I
1,338 Views

Hi Jingyang, 

 

Just following up to see if there has been any updates, or if I can provide more info (or maybe change my approach) !

 

 

thank you

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JingyangTeh
Employee
1,312 Views

Hi Scotty


So sorry that I have missed out replying your case.

You could try taking a look at the c example here

http://www.intel.com/content/dam/altera-www/global/en_US/others/support/devices/configuration/mailbox-hal-link.zip


Merry Christmas and a Happy New Year!


Regards

Jingyang, Teh


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JingyangTeh
Employee
1,267 Views

Hi Scott


Happy New Year!

Is the example shared is the one you are looking for?


Regards

Jingyang, Teh


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Scotty2
New Contributor I
1,255 Views

Hi, 

 

The 'C' example is clear however, from my understanding, you still need to have the mailbox IP BLOCK instantiated into the design and the Bitstream programmed into the FPGA because this IP would not be part of the minimum setup you need to boot into HPS. Is this correct?!

 

I am looking for a way to communicate with the mailbox (more directly the SDM) for the purpose of reading the core temperature without loading a bitstream, aside from the parts needed to boot in "HPS first" mode (EMIF and some of the I/O ring);  before using the FPGA_MANAGER to configure the bitstream through a device tree overlay.

 

For example by directly writing into the HPS memory mapped registers.

 

Thank you for the help!

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JingyangTeh
Employee
1,237 Views

Hi


It is right, the mailbox is required to access the SDM.

The mailbox will act as an interface to the SDM as the SDM is located in the FPGA Fabric.

Sorry that the SDM is designed this way.


Regards

Jingyang, Teh


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Scotty2
New Contributor I
1,227 Views

Hi, 

 

Looking at the way the RSU feature works on statix10, it also communicates with the SDM from HPS; it does so through the following flow:

RSU library (on HPS at EL0) --> intel RSU driver (EL1) --> intel SVC driver (EL1) --> SMC handler (EL3) --> SDM (Hardware)

 

This happens without programming a bitstream on the FPGA, in HPS first mode. The SVC driver and the RSU driver are implemented under "'/driver/firmware/" in the Linux repo under "stratix10-svc.c and stratix10-rsu.c". The SVC driver already has SMC call backs for reading the temperature and the voltage for HWMON. 

 

There seems to have been some support for HWMON driver under "/driver/hwmon/soc64-hwmon.c" for which the documentation is limited or missing for kernel tag "5.15.30-lts".

 

I can also see that we can read these values in U-BOOT with a SMC call, for example "smc 0xc2000021 1", this is all doable without loading a bitsteam or having a mailbox IP.

 

I am now confused as to how we are able to do these if mailbox is needed, and further mode, why (how) can we do the same for reading the temperature and the voltage from HPS?! Doesn't the ATF boot flow enable these features because it allows SMC calls to be made?!

Does one have to implement a kernel module (or use the existing /drivers/hwmon/soc64-hwmon.c)  first and the use that to make calls to the SDM from HPS? similar to how the 'librsu.c" is doing? if so, I'd appreciate a reference design or example code!

 

Thank you!

 

Kind regards

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JingyangTeh
Employee
1,202 Views

Hi Scotty


For the temperature and voltage in the SMC could be due to a special case where there is a high request to access these values.

That is why it is only accessible using the SMC.


There could be a coherency issue if we access these values without the mailbox client ip. Refer to below link:

https://www.intel.com/content/www/us/en/docs/programmable/683222/21-4/system-memory-management-unit-configuration.html


Regards

Jingyang, Teh




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JingyangTeh
Employee
1,183 Views

Hi


Any update on this case?


Regards

Jingyang, Teh


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Scotty2
New Contributor I
1,174 Views

Hi, 

 

yes I got it to work on stratix 10 with linux 5.15.30-lts and uboot 2022.01, ATF 2.6.1

 

The process is to enable the HWMON in the defconfig of the kernel (CONFIG_SENSORS_SOC64=y) and add a new node to the device tree that contains the labels and register address of the ADC channels that is then readout by the SDM. 

 

look at 5.15.70-lts for some documentation and an example of adding these nodes to the device tree. You may also look at the patches made to this tag for the HWMON and apply them yourself if needed.

 

After doing that, booting into HPS in HPS first mode without loading any bitstreams, you can read the voltages and the die temperature with a system call at " /sys/class/hwmon/hwmon0/[<name>_label or <name>_input> "

 

the values are already multiplied by 1000 in the driver.

 

Thanks

 

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JingyangTeh
Employee
1,141 Views

Hi


Great to hear that you manage to get it working!

Thanks for sharing how you did it, it is a great learning for me too.



Since this thread been resolve, I shall set this thread to close pending. If you still need further assistance, you are welcome reopen this thread within 20days or open a new thread, some one will be right with you. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


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Regards

Jingyang, Teh



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