Help using transceivers in HDMI-port on Arria V GX starter board to send TMDS data

[Altera_Forum]

I am working on a project where I want to send TMDS data to a monitor using the HDMI-port on my Arria V GX starter board. I have only limited experience form VHDL design and have also only worked with Xilinx before, and never transceivers. 

 I am using a Arria V GX starter board with a 5AGXFB3H4F35C4N FPGA and Quartus II 13.0.  For a couple of days I been trying without success to send something using the 1.5-VPCML transceivers.  What I want to achieve is to send 3 x 10bit that comes in parallel at 148.5Mhz using 3 transceiver lanes sending at 1485 Mbps. I also want to send the 148.5Mhz clock over a transceiver output.  Whether I am trying with one or more lanes I am stuck with these errors and critical warnings respectively:  Error (175020): Illegal constraint of Transmitter channel to the region (169, 11) to (169, 11): no valid locations in region Info (175028): The Transmitter channel name: hdmi_tx_p Error (175005): Could not find a location with: PMA_DIRECT_CHANNEL (1 location affected) Info (175029): Transmitter channel containing PIN_AJ3 Info (175015): The I/O pad is constrained to the location PIN_AJ3 due to: User Location Constraints (PIN_AJ3)    Critical Warning: HSSI PMA TX Serializer port 'CLKDIVTX' on node PHYnat_Tx:Trans|altera_xcvr_native_av:phynat_tx_inst|av_xcvr_native:gen_native_inst.av_xcvr_native_insts.gen_bonded_group_native.av_xcvr_native_inst|av_pma:inst_av_pma|av_tx_pma:av_tx_pma|av_tx_pma_ch:tx_pma_insts.av_tx_pma_ch_inst|tx_pma_ch.tx_pma_ser should be connected Info: Must be connected Critical Warning: HSSI PMA TX Serializer port 'CLKDIVTX' on node PHYnat_Tx:Trans|altera_xcvr_native_av:phynat_tx_inst|av_xcvr_native:gen_native_inst.av_xcvr_native_insts.gen_bonded_group_native.av_xcvr_native_inst|av_pma:inst_av_pma|av_tx_pma:av_tx_pma|av_tx_pma_ch:tx_pma_insts.av_tx_pma_ch_inst|tx_pma_ch.tx_pma_ser should be connected Info: Must be connected Critical Warning (11087): PMA direct channel(s) detected and needs to be constrained based on the guidelines in Arria V Device Handbook Volume 3: Transceiver chapter Critical Warning (184043): Fitter was unable to find Transceiver Reconfiguration Controllers associated with the following 2 XCVR PHY IP component blocks Info (184044): Avalon Memory Map block PHYnat_Tx:Trans|altera_xcvr_native_av:phynat_tx_inst|av_xcvr_native:gen_native_inst.av_xcvr_native_insts.gen_bonded_group_native.av_xcvr_native_inst|av_xcvr_avmm:inst_av_xcvr_avmm|avmm_interface_insts.av_hssi_avmm_interface_inst Info (184044): Avalon Memory Map block PHYnat_Tx:Trans|altera_xcvr_native_av:phynat_tx_inst|av_xcvr_plls:gen_native_inst.av_xcvr_native_insts.gen_bonded_group_plls.gen_tx_plls.tx_plls|pll.avmm.av_hssi_avmm_interface_inst Error (175020): Illegal constraint of Transmitter channel to the region (169, 11) to (169, 11): no valid locations in region Info (175028): The Transmitter channel name: hdmi_tx_p Error (175005): Could not find a location with: PMA_DIRECT_CHANNEL (1 location affected) Info (175029): Transmitter channel containing PIN_AJ3 Info (175015): The I/O pad is constrained to the location PIN_AJ3 due to: User Location Constraints (PIN_AJ3)   And some additional warnings which I think are irrelevant.   I am using a Native PHY IP core in direct PMA mode and have assigned the pins the I/O standard 1.5-VPCML. What might be the problem? Am I on the completely wrong track?   Your help will be highly appreciated!  Best regards, Aron

[Altera_Forum]

How is your 3 transceicer channels placed? It seems like the hdmi tx[0] is placed to invalid location. Do u refer to the referencen manual to set the pin assignment correctly?

[Altera_Forum]

--- Quote Start ---  How is your 3 transceicer channels placed? It seems like the hdmi tx[0] is placed to invalid location. Do u refer to the referencen manual to set the pin assignment correctly?  --- Quote End ---    I am unable to check my design now but can take some screenshots tomorrow. But yes, I have the positive part according to the reference manual and set them to 1.5-V PCML. The software then adds the negative part automatically.  I may also add that the error codes above are form a 1 lane test, but I get the same errors (but more) with more lanes.

[Altera_Forum]

You may need to test on one channel design first. 

so I suppose you havehdmi_tx_p [0], hdmi_tx_p [1], and hdmi_tx_p [2] since u have 3 channels right?

[Altera_Forum]

Yes I am trying with one channel first now. I have those and also one channel for clock. The HDMI pins can be seen in the table 2-41 at page 46 altera.com/literature/manual/rm_avgx_starter_board.pdf

[Altera_Forum]

Might it have to do with constraints that I need to define in a .sdc file? I know nothing about this and can't find anything in the handbook about ut. I also have "a new project" based on the golden top where I just use a native PHY and try to send something over a single channel. Still the same (relevant) errors and warnings though:  

 Critical Warning (11087): PMA direct channel(s) detected and needs to be constrained based on the guidelines in Arria V Device Handbook Volume 3: Transceiver chapter Error (175020): Illegal constraint of pin to the region (169, 23) to (169, 23): no valid locations in region Info (175028): The pin name: hdmi_tx_clkout_p Error (184016): There were not enough differential output pin locations available (1 location affected) Info (175029): pin containing PIN_AC3 Info (175015): The I/O pad is constrained to the location PIN_AC3 due to: User Location Constraints (PIN_AC3) Error (175020): Illegal constraint of Transmitter channel to the region (169, 11) to (169, 11): no valid locations in region Info (175028): The Transmitter channel name: hdmi_tx_p Error (175005): Could not find a location with: PMA_DIRECT_CHANNEL (1 location affected) Info (175029): Transmitter channel containing PIN_AJ3 Info (175015): The I/O pad is constrained to the location PIN_AJ3 due to: User Location Constraints (PIN_AJ3) Error (12289): An error occurred while applying the periphery constraints. Review the offending constraints and rerun the Fitter. Error (11802): Can't fit design in device

[Altera_Forum]

The error message does not seem related with SDC, but seem like the same pin is assigned to 2 location or fitter trying to merge two channel into same location.  

Do you have any special setting in the qsf?

[Altera_Forum]

--- Quote Start ---  The error message does not seem related with SDC, but seem like the same pin is assigned to 2 location or fitter trying to merge two channel into same location.  Do you have any special setting in the qsf?  --- Quote End ---    I am pretty sure that my assignments are correct. I have assigned the positive nodes and the software automatically assigns the negative nodes to the correct pins. I recently talked shortly to a friend and he also made me think that it might be something with how I declare the IP-cores in the .qsf. I have not done anything in the file at all, and the way that I have declared the IP-cores is like components and then "port map", is that wrong?

[Altera_Forum]

Are you using pma direct? Or what transceiver configuration are you using? Seem like error point to your pma direct channel

[Altera_Forum]

--- Quote Start ---  Are you using pma direct? Or what transceiver configuration are you using? Seem like error point to your pma direct channel  --- Quote End ---     Yes, PMA direct. Anything special I should do? It seems to be the easiest way but maybe I am missing something?

[Altera_Forum]

I am not too sure whether is there limitation for pma direct for hdmi pin, can u try to use other phy like native phy

[Altera_Forum]

I am using native PHY in direct PMA mode, but do you mean that it could work better if I use PCS? 

 I found this: http://www.altera.com/support/kdb/solutions/rd08272012_320.html  Even though it is not the error codes I get it seems to indicate that my FPGA doesnt support PMA direct mode? That is strange though, because I am pretty sure that I have seen tables that show that it do support direct PMA.

[Altera_Forum]

You may try to turn on PCS but bypass anything and see whether that works

[Altera_Forum]

Hi Arion, 

 Were you able to get your design working? I also have an Arria V GX Starter Kit that has an HDMI Rx HSMC daughtercard from Terasic connected to it. I want to do a simple pass-through design where the parallel video output from the daughtercard is sent to the HDMI Tx port on the board. Since there's no real HDMI transmitter chip on the board, I need to serialize the data myself.  Thanks, Lloyd

[Altera_Forum]

If I am not mistaken, Arria V GX not support PMA direct, and it is only supported in Arria V GT device. 

You may quickly test out but create a simple PMA direct and compile in quartus to see whether it can pass fitter.

[Timmio]

Does anyone solve this problem? I really want to send TMDS on Arria V GX Starter kit.