Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21603 讨论

How can i use LVDS pins which are not on the edge

Altera_Forum
名誉分销商 II
1,443 次查看

Hi,i'm using EP3C55F484.To connect with high speed adc,I need 24 pairs LVDS pins as receiver.The bank 5 and 6 is used. 

Now i'm placeing 100 Ohms terminal resistance around these LVDS pins.However some pairs of pins are not on the edge. 

Because the terminal resistance should be close with LVDS receivers,may be less than 10mm's distance.It's ok for pins on the edge,but how about these pins not on the edge? 

Thanks  

0 项奖励
2 回复数
Altera_Forum
名誉分销商 II
707 次查看

You can place the terminating resistors in 'fly by', i.e. route the signals to the pins of the bga and then continue the routing further to the resistor, you may need an extra layer in the PCB for this. 

Another possibility is to use the small 0402 size of resistors, with a bit of arranging they fit between the vias used to connect the bga pins.
0 项奖励
Altera_Forum
名誉分销商 II
707 次查看

Right, bottom side placement is the ultimate solution for bypass capacitors and termination resistors. In my view, it can't be hardly avoided for high speed designs. With 1 mm pad grid of FPGA packages, they can be either placed between vias, or even more elegant exactly at plugged vias in case of adjacent pins, which is possible with most supply pins and many differential pairs.

0 项奖励
回复