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Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21322 讨论

How do you choose if you use REFCLK T or B for PCIe?

fgfasfafgfdhagdszfea
1,251 次查看

I'm working on the PCIe for a Cyclone 10 GX 10C085 and I have a question regarding the REFCLK for the PCIe.

 

How do I know if the reference clock should go in REFCLK_GXBL1C_CHT or REFCLK_GXBL1C_CHB (T or B)?

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skbeh
员工
1,236 次查看

The PCIe Hard IP placement always starts at bottom transceiver block.

T: Top

B: Bottom

So please assign the pcie refclk pin to the Bottom location REFCLK_GXBL1C_CHB (B)


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fgfasfafgfdhagdszfea
1,231 次查看

Thanks, that is what I will do! Is there anywhere specific in the documentation that I could have found that information?

Is REFCLK_GXBL1C_CHB required (REFCLK_GXBL1C_CHT wouldn't work) or is it just preferred (easier fitting or something like that)?

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skbeh
员工
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I repost the reply.

You can download and refer to the Device pin-out file of '10CX085' from below link:

https://www.intel.com/content/www/us/en/support/programmable/support-resources/devices/lit-dp.html

It is required to use REFCLK_GXBL1C_CHB.

skbeh_1-1653032990575.png

Inside the pin out file:

skbeh_0-1653032902219.png

 

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skbeh
员工
1,218 次查看

You can download and refer to the Device pin-out file of '10CX085' from below link:

https://www.intel.com/content/www/us/en/support/programmable/support-resources/devices/lit-dp.html

It is required to use REFCLK_GXBL1C_CHB.

Inside the pin out file:



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fgfasfafgfdhagdszfea
1,197 次查看

Did you post some images? I can't tell for certain, but it looks like the images aren't showing up in the post.

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