Sometimes it happens, that PCBs need to be reworked.
Thank you for contacting Intel Community.
To know the soldering information during assembly PCB, you may refer to AN 114 in the link below:
For process reflow, kindly refer to the link below:
Let me know if you need further information.
Thanks for your answer. Having a look at the application notes you pointed to, I found the interesting and valuable. Yet, the point of the question unfortunately seems not hit.
Is there a limitation in the number of reflow-cycles an FPGA can run through before the warranty by Intel is impacted?
Thank you for your respond. Apologize that my previous respond did not answer to your queries.
I will need to check this with our internal team. I shall get back to you next week with the findings.
Thank you for understanding.
Just would like to clarify if you are referring to the reflow peak temperature of Arria 10. If yes, you may refer to AN353 document, Table 2:
For Arria10 which is lead free part, the peak reflow temperature could be referred to Table 4 of AN353.
Time within 5C of peak Tp of lead free part is 30 seconds while the number of reflow cycles = 3.
The max reflow time for our device is 3 times. The 3 time reflow adopted by JEDEC/IPC 020-D is based on the assumption that most devices on the PCB will see 3 temperature excursion.
· 1st reflow
· 2nd reflow (double sided board)
· 1 extraction (or rework)
They expect the device to be still functioning with 3 times reflow.
Hope this clarify.