Community
cancel
Showing results for 
Search instead for 
Did you mean: 
Altera_Forum
Honored Contributor I
919 Views

How to FIND QSF file for 5SGXEA7K2F40C2N?

Can anyone help to FIND QSF file for 5SGXEA7K2F40C2N. I am using Stratix V GX FPGA Development kit. Please Help me how I can get qsf file for this board ?

0 Kudos
7 Replies
Altera_Forum
Honored Contributor I
33 Views

 

--- Quote Start ---  

Can anyone help to FIND QSF file for 5SGXEA7K2F40C2N. I am using Stratix V GX FPGA Development kit. Please Help me how I can get qsf file for this board ? 

--- Quote End ---  

 

 

Either the vendor who created the board has a sample .qsf file from an example project that they supply (check their website), or launch quartus, start a new project and select that device, or create one manually by entering the appropriate commands into a text file (a .qsf file is just a text file with a .qsf extension).
Altera_Forum
Honored Contributor I
33 Views

Thank you for your reply. I am a beginner and trying to use this board and Quartus software. Can you tell me how I can write command for specific board ? If there is link to learn it, and you can provide me I will appreciate your help.  

 

Thank you ..
Altera_Forum
Honored Contributor I
33 Views

 

--- Quote Start ---  

Either the vendor who created the board has a sample .qsf file from an example project that they supply (check their website), or launch quartus, start a new project and select that device, or create one manually by entering the appropriate commands into a text file (a .qsf file is just a text file with a .qsf extension). 

--- Quote End ---  

 

 

Thank you for your reply. I am a beginner and trying to use this board and Quartus software. Can you tell me how I can write command for specific board ? If there is link to learn it, and you can provide me I will appreciate your help.  

 

Thank you .
Altera_Forum
Honored Contributor I
33 Views

 

--- Quote Start ---  

Thank you for your reply. I am a beginner and trying to use this board and Quartus software. Can you tell me how I can write command for specific board ? If there is link to learn it, and you can provide me I will appreciate your help.  

 

Thank you . 

--- Quote End ---  

 

 

So is this the board you have: https://www.altera.com/products/boards_and_kits/dev-kits/altera/kit-sv-gx-host.html 

 

If so, there are a number of documentation and sample file downloads listed there. I would suggest looking at a sample design as a starting point.
Altera_Forum
Honored Contributor I
33 Views

Thank you, I have already gone through that website but there is no specific information of .qsf file or how to allocate the pin or how to right command for .qsf file. 

 

Thank you for your help !!
Altera_Forum
Honored Contributor I
33 Views

A .qsf is a Quartus settings file that is part of a Quartus project (defined by a .qpf file). As mentioned, download a "kit installation" file from that website and look at the example project. 

 

If you are a true beginner, look at the hardware developers training curricula here and start working through the online training classes to get familiar with the basics: 

 

https://www.altera.com/support/training/curricula.html
Altera_Forum
Honored Contributor I
33 Views

 

--- Quote Start ---  

Thank you, I have already gone through that website but there is no specific information of .qsf file or how to allocate the pin or how to right command for .qsf file. 

 

Thank you for your help !! 

--- Quote End ---  

 

 

If you download the 'installation kit' at ftp://ftp.altera.com/outgoing/devkit/13.0/stratixvgx_5sgxea7kf40_fpga_v13.0.0.0.exe, then 

install it and look under examples/golden_top/5sgxea7k2f40c2 there is a file s5_golden_top.qar which is an Altera project archive file. 

Open this file in Quartus and restore the archive as a sample project. Then in the directory: s5_golden_top_restored 

you will find the file s5_golden_top.qsf which is the basic template .qsf file you are looking for. There is also the corresponding verilog 

top level file: s5_golden_top.v which goes along with it as the verilog top level project template.
Reply