If there are multiple FPGAs on the JTAG chain, altera recommends using JTAG buffer chip on TMS, TCK and TDI pins. I could not find a proper schematic for this.Anyone can help?
I think you used the voltage supply for the buffer chip as 2.5V.I created a similar schematic using the buffer chip 74LVC541ADB but it did not correctly work. The voltage supply for the buffer chip was 3V. Please check my thread http://www.alteraforum.com/forum/showthread.php?t=53823