I want to change the data width of read master and write master, but it seems there is no way to change it. Do you know how to change that?
Long time ago, I successfully changed it to 128bit and there is also a byte enable signal in write port.
You probably just need to change a parameter. Reopen the parameter editor for the IP (may be a .qsys or .ip file depending on if you're using Standard or Pro) and change the parameter. Most IP like this and their parameters are documented here: https://www.intel.com/content/www/us/en/docs/programmable/683130/22-3.html
go through this document. if you see here quadword support 128 bit.
may i know which version did you used previously?
- Byte (8-bit), halfword (16-bit), word (32-bit), doubleword (64-bit) or quadword (128-bit)
those are transfer type, there is no option to change width.
i want to know on which version you did those changes?
i discoursed with engineering team every one, telling we don't have option to vary the data width of DMA. i shared your platform design also, they telling you did changes in source code. Actually we are not able to give support for source code changing. if any problem is there in working of IP we can give support. sorry.
in DMA controller IP document you see functionality of DMA
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