How to support XUAI PHY in STRATIX 10 GX

BQi · ‎03-07-2020

I can not find the XUAI PHY IPCore in S10 device

but I can find the user guide of XUAI in A10 , Stratix 5 etc, how about Stratix 10?

Deshi_Intel · ‎03-09-2020

Hi,

I am sorry to notify you that XUAI PHY is an EOL IP where the last supported FPGA is Arria 10.

The recommended replacement IP will be 10GBASE-R PHY IP.

Thanks.

Regards,

dlim

BQi · ‎03-09-2020

Dear What is the difference between XUAI and 10GBASE-R? THANKS

Deshi_Intel · ‎03-09-2020

HI,

XAUI is special "XGMII extender interface" used to connect Ethernet 10G MAC and Ethernet 10G PHY together.

XAUI is mainly used to extend the operational distance between MAC and PHY chip and also to reduce the number of required interface signals.

However, XAUI has been EOL in Intel FPGA due to lower demand from customer.

You can refer to below link for further detail.

Thanks.

Regards,

dlim

BQi · ‎03-11-2020

we have to connect with XILINX Virtex 7 with 4 channels transceiver, if we can not use XUAI, what link can we use for 3.125G X4 ?

Deshi_Intel · ‎03-11-2020

Hi,

XAUI is very old technology.

Ethernet 10G industry has evolved long time ago from using old (4 x 3.125G XAUI) to newer single 10.3G channel interface.

I am sorry but can you check with Xilinx to see if their FPGA transceiver channel is able to support 10G or not as it make more sense to adapt to latest technology trend ?

Thanks.

Regards,

dlim

Deshi_Intel · ‎04-20-2020

HI,

I don't hear back from you after my feedback suggestion.

Hopefully Xilinx device is able to interact with single 10G channel.

For now, I am setting this case to closure.

Thanks.

Regards,

dlim