How to use MSI-X with PCIe-DMA IP in Arria 10

[Jevon121]

Hello, 

I want to  use MSI-X function with PCIe-DMA IP, when enable relative settings in IP pages, little changes in the ports.  Attached picture shows related ports when setting.

Should I  add some wr/rd flow(to access the ability and PBA tables) and interfaces（to access TXS and some other channels） in the user logic to obtain the function ?

Are there other parameters need to be set in the MSI-X page in the picture under normal cases?

Thanks a lot!

[ventt]

Hi @Jevon121,

Thanks for reaching out to the Intel Community Forum.

When implementing MSI-X with PCIe Hard IP in Qsys, check the "Implement MSI-X" option in the PCI Express/PCI Capabilities section under the IP Settings tab. User needs to fill in the parameters such as the Table Size, Table Offset, Table BAR Indicator (Table BIR), Pending bit array (PBA) Offset, and PBA BAR Indicator (PBA BIR).

You may refer to the FPGA Wiki link below on how to implement the PCIe MSI-X interrupt in FPGA:

https://community.intel.com/t5/FPGA-Wiki/Implementing-MSI-X-for-PCI-Express-in-Altera-FPGA-Devices/ta-p/735678

Thanks.

Best Regards,

VenTing_Intel

[ventt]

Hi @Jevon121,

May I know if you have further questions regarding this case?

Thanks.

Best Regards,

VenTing_Intel

[ventt]

Hi @Jevon121,

We have not received any response from you on the previous answer that we provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you.

After 15 days, this thread will be transitioned to community support.

The community users will be able to help you with your follow-up questions.

If you feel your support experience was less than a 9 or 10, please allow me to correct it before closing, or please let me know the cause so that I may improve your future support experience.

Thanks.

Best Regards,

VenTing_Intel