The major problem is, i cannot route the input lvds signal between the input to the LVDS_RX IP and input to the lcd externally connected at the same time.Either as input to the lcd or IP is possible.Is there any way for routing the lvds signal simultaneously to both the inputs.
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Hi @JGeor12
I would like to help but its hard for me to imagine the topology that you are referring. A diagram would be great.
If you mean like a single TX to multiple RX via LVDS, then I dont think it is possible.
The logic is illustrated in the attached figure.Here i am trying to feed lvds rx ip and lcd with the same lvds input.But it is leading to the routing problems.So is there any way for achieving this.
Actually iam trying to branch out the input lvds signal from FPGA to outside LCD.since the input to the lcd is lvds signals, is there any way for feeding the lcd with the same lvds signals by any other means using the fpga.
I understand your need, but the LVDS RX IP is designed in such a way that you cannot branch out.
Doing so, you will see Quartus will block you with an error.
I dont see any other means using the LVDS RX IP, unless you would like create your own custom IP for that particular usage.
If not, you might need to look into off-chip solutions.
I don't need the output of RX IP, i just needed the input lvds signals to give it back to the LCD.
Can i do like the method illustrated in attachment.If so, can you help me on that.
Does it affect the quality of frames?another doubt is ,i have given 112.50 degree phase shift in LVDS_RX IP and how will it affect the bit change or difference in the bit order .For eg. if bit number of hsync is 14 and how will it change based on the above mentioned degree of phase shift.
hi @JGeor12 The LVDS RX phase shift affects the word alignment on the parallel side of the interface...you might want to ensure the word alignment is correct first before you transmit it over the LVDS TX.
does all the bits change according to the same difference.if not how can we find the change .
You should signal tap on the parallel interface (not the serial interface) i.e. output of LVDS RX or input of LVDS TX.
