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Implementing Power operator

Altera_Forum
Honored Contributor II
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Hi, 

The power operator available with Verilog takes the base value 2 only !! 

i.e it will only perform operation: 

 

Result = 2 ** exponent. 

 

 

But, say if I want to take the base value someting else, then please tell me how to implement the power operation. 

 

Result = some_base ** exponent 

 

 

Thank you, 

 

-Amit Garg
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Altera_Forum
Honored Contributor II
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I would be surprised if that's possible. The power of 2 is trivial, but everything else is far from it. In general, even a simple multiply is pipelined to meet useful speeds(although many designs don't do that). A power operator would be extremely large and slow without any pipelining or feedback. And if your exponent is the variable, there's really no way build enough multipliers in parallel for whatever values that exponent could take.

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Altera_Forum
Honored Contributor II
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For a constant base, the valid exponent range is rather limited, e.g. 0 to 20 for base 3 and a 32 bit result. So it can be realized as a case structure. It needs 52 logic cells with a Cyclone III. 

I also tried with an iteration, but the compiler apparently wasn't able to reduce the result completely, it ended with about 650 logic cells. You can also calculate a table at compile time and infer either ROM or fixed logic. But I don't know if this works with Verilog, no problem with Quartus and VHDL, however.
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Altera_Forum
Honored Contributor II
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Thank you both, 

Actually my real problem is that, I have to apply exponential transformation on a greyscale image, so that I can bring out its overexposed parts. 

So, I guess my base will be a constant a little greater than 1, say 1.01 and 

exponent will be the greyscale values from 0 to 255.
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Altera_Forum
Honored Contributor II
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A base of e.g. 1.01 involves float or fixed point arithmetic that isnt't supported by synthesizable Verilog (or VHDL) standard operators. I think, it can be perfectly achieved by a lookup table, calculated at compile time or externally supplied. 

 

I don't know, if the Quartus Verilog implementation offers compile time calculations with float variables and functions, that allow to perform all calculations in the HDL code, as it's possible with VHDL. 

 

Another option is to find a polynomial approximating the exponential function.
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