Initiate FPGA power down or remove bitstream from a trigger

[rohith1]

Is it possible to stop the program running on the fpga (flash the bitstream) based on a trigger on the fpga?

[YuanLi_S_Intel]

Hi,

Do you mean that, stop FPGA programming during bootup?

Regards,

Bruce

[rohith1]

No, let's say the FPGA is getting too hot or something like that. I want to sense that using the tsd and stop the FPGA from continuing its calculations

[sstrell]

A TSD IP would have an output control signal alarm or interrupt you could use to shut off other parts of the design.

Once an FPGA is programmed/configured, it's going to continue running until it loses power or the device (not the design) is reset.  So you'd have to include logic in the design to perform any actions based on the TSD.

[YuanLi_S_Intel]

Well said! I hope that everything is clear now. Let us know if got any other question.