Internal Clock HELP

Altera_Forum · ‎12-30-2010

Helloo..

I had a project to do on an Altera Cyclone II board, it's a Digital Calendar. I've completed it successfully but I have a problem with the clock, I have a 27MHz and 50MHz internal clocks, and I need to make the calendar increments a day every 24 hours.. anyone has any idea wut am i supposed to do.. wut I thought abt is that we know the Frequency= 1/Time period..

so if I say : 24hrs * 3600 seconds =86400 .. so the frequency i need in order the calendar turns after 24 hrs is 1/86400 am I right ??

Please I need help ASAP .. :) thnx

Altera_Forum · ‎12-30-2010

a cascade of counters, something like this:


process -- clked on 27MHz
if Hz_count /= 27000000-1 then
    Hz_count <= Hz_count +1;
else
     Hz_count <= 0;
     if seconds_count /= 59 then
             seconds_count <= seconds_count + 1;
     else
             seconds_count <= 0;
             if minutes_count /= 59 then
                   minutes_count <= minutes_count + 1;
              else
                   minute_count <= 0;
                   if hours_count /= 23 then
                          hours_count <= hours_count + 1;
                   else
                          hours_count <= 0;
                          if days_count /= final_day then
                                 days_count <= days_count + 1;
                          else
                                  days_count <= 1;
                          end if;
                  end if;
            end if;
     end if;
end if;

Altera_Forum · ‎12-30-2010

Is this pure 100% HDL project OR Nios II project?

Altera_Forum · ‎12-30-2010

It's a pure VHDL .. usually i used to divide the clock to make it faster.. but now i need it slower ..

Altera_Forum · ‎12-30-2010

Then as suggested by others, previous posts, you can divide down MHz to Hz. Then use it has global clock. At Hz frequency, PLL would not work.