Hi Folks,
I'm pretty new to Altera FPGA systems. I intend to do a project related which deals with a low-cost reconfigurable architecture and I'm intend to use a Cyclone II EP2C20F484C7 device. I would like to know if reconfigurability can be achieved on this FPGA device. Thank you.連結已複製
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Both Cyclone II and Cyclone III may (will) be able to support what you want to do.
The real question is what will be the source of the new configuration for each of the Time-Sliced Processes, and how much time can you afford for the Hardware task swap and will there be a need for any "state of the machine" value to be stored (and where will the y be stored. Hope this helps, Avatar@std_logic, Avatar
Thank you for your response. Now, this isn't exactly my project but its something similar, wrt implementation methodology. " a dynamic self-reconfigurable mobile robot navigation system -- A mobile robot navigation system must adapt to the highly dynamic environments and emergencies under the real-time constraints. Sometimes some sensors may not work well with new environments while others may need to swap in at runtime to continue the navigation. This is an an agent-based embedded system platform which can dynamically reconfigure the robot system on the fly by integrating FPGA hardware and high-performance microprocessors system. Several dynamic reconfiguration models are described to improve the system efficiency with low reconfiguration latency. The reconfiguration architecture specifically for vision system is also presented. This platform can be easily extended to other robot systems, such as server robots, space robots, and multi-robot systems " source: http://intl.ieeexplore.ieee.org/xpl/freeabs_all.jsp?tp=&arnumber=1511230&isnumber=32215 Will I be able to implement something like this on the cyclone II board?I cannot answer your question because I have no way of knowing if YOU will be able to do it. (I could not resist!)
I can say that it can be done! The real item to address and be concerned with is the reload time of the FPGA sub-system. If your sysem can tolerate the down-time during reload, then you will be fine. Mission critical components of the design may not be able to tolerate the "missing" FPGA portion of the design. If you can work within those parameters, then yes, the FPGA will work well for your application. Keep us all posted of your development.Hello,
--- Quote Start --- If your system can tolerate the down-time during reload, then you will be fine. --- Quote End --- You hit the point. None of Altera FPGAs offers dynamic or partial reconfiguration of central logic function, the refconfiguraion option present in some newer devices is restricted to PLL or GXB interfaces. Thus the configuration as a whole has to be swapped to change logic definition. In this field, competitors are one step ahead. Regards, FrankJust to correct Frank. Some Cyclone 3 devices can be reconfirgured dynamically. That is, the present image will reach a certain state where it will then go and reload another image from parallel flash. I have this working with my Cyclone 3 starter kit.
For the Robot app, I cannot image the FPGA having to chnage that much for different environments. The hardware around it will be the same but the settings and constants etc might need to be different. In this case I think it would be easier to just reprogram these. Hard to know without seeing the whole spec but the great thing with FPGAs is there are lots of choices!!--- Quote Start --- Hello, You hit the point. None of Altera FPGAs offers dynamic or partial reconfiguration of central logic function, the refconfiguraion option present in some newer devices is restricted to PLL or GXB interfaces. Thus the configuration as a whole has to be swapped to change logic definition. In this field, competitors are one step ahead. Regards, Frank --- Quote End --- But alas, while they are marketing ahead, they do not possess any solid practical tool methodology to efficiently achieve said partial reconfiguration. And just to set the record straight, Concurent Logic (bought by ATMEL) was the first FPGA company to commerially offer partial reconfiguration to the user. And it worked great as well.
Now to the point raised by the prior post, agreed, the external logic is committed to the IO pins, and as such, one could most likely design internal reprogrammable functions that could adaptively mutate their functions under NIOS II control, effectively achieving partial reconfiguration (of sorts) without the need to fully reload the entire FPGA array.
It just depends on what you are trying to do, the time frame you are (need) to get it done in, and how parallelly expansive you allow your mind to think (float). AvatarHello,
Cyclone III has local and remote update ability, clearly distinguished from "dynamic reconfiguration". To perform a reconfiguration, the previous configuration has to be reset and the FPGA array reloaded, thus all logic functionality stops for a while. For applications tolerating a short blackout, this feature could be equivalent to "real" dynamic reconfiguration. I basically agree with Avatar, that dynamic configuration today is mainly an object of marketing. Personally, I have no need to utilize this technique in a project. In contrast, in many of my applications (industrial measurement, power electronics) there are obvious reasons to avoid such options from a todays view. The view may change, as the said solid tool methodology develops. Regards, Frank