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Is it possible to access loanIO of hps from a fpga ip core with bidirectional IO?

Mingyuexin
Beginner
794 Views

Hi, 

I have a customized design which I have routed a NVRAM to SPI pin of HPS side. 

Now the software team wants to access NVRAM like a flash. So I'm thinking to use generic flash controller ip core in FPGA to control it. I know it's possible to loan pins from HPS to FPGA. 

The issue here is :

The generated conduit signals supposed to connect to FPGA are only unidirectional, see 

._hps_io_gpio_inst_LOANIOXX   Bi-direction              to top level pin assignment
._h2f_loan_io_in                            Out                              to FPGA logic
._h2f_loan_io_out                          In                                to FPGA logic
._h2f_loan_io_oe                           In                                 to FPGA logic

But the generic flash control ip has bidirectional IO for data transfer. It seems I can not connect them together. Is there any solution for this? If not, then I have to redesign the board to use FPGA pin instead. 

Thank you very much for your time. 

Any response/reply is appreciated. 

Mingyuexin

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8 Replies
EBERLAZARE_I_Intel
780 Views

Hi,

May I know the Quartus version you are working with?

Also, which board are you referring to? Is It Cyclone V SoC, Arria 10 SoC etc

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Mingyuexin
Beginner
776 Views
Hi, 

Thank you very much for the response. 

I'm working with Quartus Prime standard 18.1. 

My board is Cyclone V SOC. 

Thank you very much for your time. 

Best regards

Mingyuexin
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Mingyuexin
Beginner
765 Views

Hi,

Do you have any solution or suggestions on this?

 

With best wishes

Mingyuexin

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EBERLAZARE_I_Intel
757 Views

Hi,

Accord to our Cyclone V SoC Device Design Guidelines, the recommend peripherals that the HPS dedicated IO with loaner are: QSPI, NANDx8,eMMC, SD/MMC, UART,USB, EMAC

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an-cv-av-soc-ddg.pdf#page=17

NVRAM is not entirely supported. But you may check our video tutorial on how to initiate the example of HPS loaner IO using Qsys/Platform Designer here:

https://www.youtube.com/watch?v=cRwzmsJ1Jkg

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taojinyong
Beginner
229 Views

I have a question. For Arria10 devices, I don't see the LOANIO option, and my quartus version is 18.1

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Mingyuexin
Beginner
213 Views

Sorry I have never used Arria 10, I do not know. 

Best regards

Mingyuexin

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open01
New Contributor I
594 Views

Hi Mingyuexin,
Want to ask this question, have you found the answer? I also want to know this part.

Thank you.

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Mingyuexin
Beginner
213 Views

Sorry to see your question this late. 

We redesigned the hardware to use FPGA fabric to communicate with the flash. 

With best wishes

Mingyuexin

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