You can check out each FPGA & CPLD device handbook under the JTAG Boundary Scan Testing chapter to find respective device IDCODE information. Otherwise you can check the IDCODE information from each device BSDL files that can be found in the following links:
1. IEEE 1149.1 BSDL Files
2. IEEE 1149.6 BSDL Files
Thank you, NYusof.
Ok, that will work for sure.
Just wondering why there is no list with all the IDCODE for all of the (formerly) ALTERA devices.
Couldn't imgane that the Quartus prorammer will open several (BSDL) files just to find out what is in the
JTAG chain. Guess the programmer uses a ready made list for detecting devices in the JTAG chain.
Am i wrong about that?
The Quartus programmer does not use BSDL file to detect the FPGA or CPLD devices. The programmer is built with its own database to detect the device in JTAG chain. All the device IDCODE information can easily be found from respective FPGA & CPLD device handbook under the JTAG Boundary Scan Testing chapter. There is no reason to keep a list on all device IDCODE information as there will always be newer devices being develop where its device handbook will cover this information.