Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Is there any issue, when the data bus connected between FPGA and MCU, both side are in input state at a particular stage

DNS00
Beginner
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ak6dn
Valued Contributor III
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Nope. Just turn on the 'bus hold' feature on the FPGA inputs so the bus lines don't float and/or possibly oscillate.

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