You may consider to use the open source Jam/JBC STAPL player that allow use to program the FPGA or CPLD device via JTAG interface with .jam/jbc file. For the details you may refer to the following link:
However please take note that, this Jam/JBC STAPL player is already EOL (no longer maintain). We no longer provide the support for this tool. You may use as it is since it open source.
You can take a look at the following App Notes :