Large fast counters (MaxII)

[Altera_Forum]

I'm trying to create a large fast long variable delay. My obvious approach is a 17-bit counter that loads when the trigger arrives and counts down to zero when it stops. Unfortunately even with a -3 speed MAXII, I can't make this work for more than 8-bits with a 250MHz clock. 

 If I were doing this in 74 series logic, I'd use enable lookahead on parts such as 74163 but I'm not sure this approach is possible in VHDL on a MAXII.   Is this the right sort of approach, or are there better ways of achieving the desired effect?

[Altera_Forum]

Try chaining small counters together.

[Altera_Forum]

--- Quote Start ---  Try chaining small counters together.  --- Quote End ---   To get to 17-bit equivalent with 8-bit counters, I'd need 512 of them, so this isn't viable.   ===   I've realised that carry lookahead won't work in the same way as on a 74163 because the logic is ram lookup and therefore any input change could cause a glitch defeating the lookaheads purpose of a longer setting time.   My current thought is to divide the 250MHz clock by 4 (synced at 250MHz to the trigger input) and use this 62.5MHz clock to do 15-bits of the delay plus about three-bits of 250MHz delay.   Is it possible to connect an internally generated signal to a global clock line? If so how?

[Altera_Forum]

You may want to look at this thread: http://www.alteraforum.com/forum/showthread.php?t=22965 (http://www.alteraforum.com/forum/showthread.php?t=22965) message# 4 

The example is for a 1 Hz generator divided down from 50 MHz, but it shows how cascading works. If I use a -3 device it runs up to the restricted 304 MHz.

[Altera_Forum]

--- Quote Start ---  You may want to look at this thread: http://www.alteraforum.com/forum/showthread.php?t=22965 message# 4 The example is for a 1 Hz generator divided down from 50 MHz, but it shows how cascading works. If I use a -3 device it runs up to the restricted 304 MHz.  --- Quote End ---     Thanks....