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I am working on a verilog design. I am using Modelsim 10.1b DE as a simulation tool.
When I give my design for simulation I get the following errors: # ** Error: c:/altera/12.0/quartus/eda/sim_lib/arriav_atoms.vhd(3060): Library altera not found.# ** Error: c:/altera/12.0/quartus/eda/sim_lib/arriav_atoms.vhd(3065): (vcom-1136) Unknown identifier "altera".# # ** Error: c:/altera/12.0/quartus/eda/sim_lib/arriav_atoms.vhd(3069): VHDL Compiler exiting# ** Error: D:/modelsim_dlx_10.1b/win32pe/vcom failed. I have chosen verilog as my language, but its seem to invoke some VHDL files. Please help what I need to do to simulate my design.Link Copied
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my friend.. you are using Altera 12.0 right? can you use the model sim that is aligned with this version of quartus? should be using v10.0d instead.
https://wl.altera.com/download/software/modelsim-starter/12.0- Mark as New
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some kind of library error.
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You need to compile the altera simulation library if you haven't already done so.
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Thanks for the update. Yes I am using Quartus II 12.0 ver. I went through the above link
I am using Modelsim as a seperate simulation software and not the one that comes along with the Quartus tool. And also Modelsim works fine with VHDL language as the design entry. This error cropped up when I started using Verilog language.- Mark as New
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Thank you Galfonz.
I have compiled the simulation libraries by initiating the Launch Simulation Library Compiler for Verilog and VHDL languages in the tools menu of Quartus 12.0. Even then I get the same errors. Are there anymore steps that I need to undertake?- Mark as New
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maybe try revert version?

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