We have made five boards with FPGAs MAX10 10M50DCF484C8G in 484-pin FBGA package. Pin F18 do not respond to any control, is always high. Measurements shall be made using oscilloscope. Fixed frequency meander currently fed to the pin F18 (I/0 bank 6) for testing purposes.
The same signal (meander) fed to another pins. Another pins work correctly, no matter in which bank pin is located.
Low signal fed to pin F18 also useless. F18 is still high. Pin F18 work correctly on DE10-Lite Board using the same program.
Pin F18 can be used to implement a high-speed differential interface according to pin-out file.
Dedicated Tx/Rx Channel: DIFFIO_RX_R53n
Emulated LVDS Output Channel: DIFFOUT_R53n
However, in this project all pins configurated as 3.3 V LVCMOS I/O. DDR2, DDR3 or LPDDR2 external memory interfaces are also not used in working project, nor in testing project.