- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
I have instantiated an Altera on chip flash memory in a code to perform field upgrade in a 10M08 device. 1. Please clarify the starting address to be used, to write an application image to CFM1 & CFM2. 2. Why is the address line width is [16:0] (in fig.2), and not [17:0] even though it require 18-bits to represent the address space of CFM1 & CFM2. https://mail.google.com/mail/u/1/?ui=2&ik=977f7fa26c&view=fimg&th=15b8a3972cb8686e&attid=0.1&disp=emb&realattid=ii_15b8a3972cb8686e&attbid=ANGjdJ9gNj2H7C03VybV1OVMBS7TYwHU7oBqVWfpsE9Re72N1fyrp5_EPPH-Riwq5zDd2ue7yze2MD-6efWRFSUPXMOQl_rzdDBvvGLOuN_JGL0BGqR5Y8OXjg1uB08&sz=s0-l75&ats=1492672672953&rm=15b8a3972cb8686e&zw fig.1 - Address Mapping in Dual Compressed Image configuration mode https://mail.google.com/mail/u/1/?ui=2&ik=977f7fa26c&view=fimg&th=15b8a40e7fc9038c&attid=0.1&disp=emb&realattid=ii_15b8a40e7fc9038c&attbid=ANGjdJ_RWhtdgJsc7ptNR4Ppc2hDAEhgcGIC8IBJ6N2YSvBGauX7EokWlefU8nhVundJj34AuHfKdvejfGLycRpchg3a_01xiWFMwr1V2B3rR36Fb97jYCjxFGWTp7A&sz=s0-l75&ats=1492673161364&rm=15b8a40e7fc9038c&zw fig.2 - On Chip Flash IP Thanks in advance , SSKLink Copied
2 Replies
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I think the flash ip is using word address (32 bit), not byte address.
--- Quote Start --- Hi, I have instantiated an Altera on chip flash memory in a code to perform field upgrade in a 10M08 device. 1. Please clarify the starting address to be used, to write an application image to CFM1 & CFM2. 2. Why is the address line width is [16:0] (in fig.2), and not [17:0] even though it require 18-bits to represent the address space of CFM1 & CFM2. https://mail.google.com/mail/u/1/?ui=2&ik=977f7fa26c&view=fimg&th=15b8a3972cb8686e&attid=0.1&disp=emb&realattid=ii_15b8a3972cb8686e&attbid=ANGjdJ9gNj2H7C03VybV1OVMBS7TYwHU7oBqVWfpsE9Re72N1fyrp5_EPPH-Riwq5zDd2ue7yze2MD-6efWRFSUPXMOQl_rzdDBvvGLOuN_JGL0BGqR5Y8OXjg1uB08&sz=s0-l75&ats=1492672672953&rm=15b8a3972cb8686e&zw fig.1 - Address Mapping in Dual Compressed Image configuration mode https://mail.google.com/mail/u/1/?ui=2&ik=977f7fa26c&view=fimg&th=15b8a40e7fc9038c&attid=0.1&disp=emb&realattid=ii_15b8a40e7fc9038c&attbid=ANGjdJ_RWhtdgJsc7ptNR4Ppc2hDAEhgcGIC8IBJ6N2YSvBGauX7EokWlefU8nhVundJj34AuHfKdvejfGLycRpchg3a_01xiWFMwr1V2B3rR36Fb97jYCjxFGWTp7A&sz=s0-l75&ats=1492673161364&rm=15b8a40e7fc9038c&zw fig.2 - On Chip Flash IP Thanks in advance , SSK --- Quote End ---- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Have you solved this Issue I am running into the same problem. I am assuming that I can just drop the lower 2 bits but I want to make sure.
Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page