Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

MSEL driving

Altera_Forum
Honored Contributor II
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Hi, 

On page 246 Arria10 Handbook says: "To select a configuration scheme, hardwire the MSEL pins to VCCPGM or GND without 

pull-up or pull-down resistors."  

On page 247 Arria10 Handbook says: "Do not drive the MSEL pins with a microprocessor or another device." 

 

Why not?
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Altera_Forum
Honored Contributor II
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Because the inputs could potentially change, messing up programming of the device. You could probably do it but you have to make sure the levels are fixed before device programming.

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Altera_Forum
Honored Contributor II
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Specifically the levels must be well defined when the FPGA gets out of POR, which is probably not the case if you drive them with a microprocessor that is on the same supply rails. If the microprocessor is on another power supply, is powered on before the FPGA, and provides the correct MSEL levels before the FPGA gets out of POR, then it should be fine. Alternatively it could hold the FPGA in reset state by holding the nCONFIG pin low until the MSEL pins have the correct levels. 

I think what Altera says there is that you are on your own if you want to drive those pins programmatically. 

 

Is there any reason why you'd like to drive those pins?
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Altera_Forum
Honored Contributor II
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The last part is a bit speculative. I assume that the FPGA would read the MSEL pins when the nCONFIG signal goes high, but if you need to rely on that, maybe you should check this first with a dev kit, by for example powering on the kit, then change the MSEL DIP switches, trigger a reconfiguration and check that the FPGA does indeed use the new MSEL value and not the old one.

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Altera_Forum
Honored Contributor II
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I'm fairly certain that MSEL is sampled off the nCONFIG edge like Daixiwen said.

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