Mapping a basic UART project to the HPS_UART pins

[JuiceG]

Hi,

I am currently working working on a project for a class that I am TAing and was asked to add the ability to send and receive data between the DE1-SoC board and a host computer. 

I have built a project following this video here:

https://www.youtube.com/watch?v=fMmcSpgOtJ4

but when I set up the pin assignments for the HPS_UART_RX and HPS_UART_TX pins I get the following errors:

Error (14566): The Fitter cannot place 2 periphery component(s) due to conflicts with existing constraints (2 pin(s)). Fix the errors described in the submessages, and then rerun the Fitter. The Intel FPGA Knowledge Database may also contain articles with information on how to resolve this periphery placement failure. Review the errors and then visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number.
Error (175020): The Fitter cannot place logic pin in region (79, 81) to (79, 81), to which it is constrained, because there are no valid locations in the region for logic of this type.
Info (14596): Information about the failing component(s):
Info (175028): The pin name(s): UART_TXD
Error (16234): No legal location could be found out of 1 considered location(s). Reasons why each location could not be used are summarized below:
Error (184016): There were not enough single-ended output pin locations available (1 location affected)
Info (175029): C25
Info (175015): The I/O pad UART_TXD is constrained to the location PIN_C25 due to: User Location Constraints (PIN_C25)
Info (14709): The constrained I/O pad is contained within this pin

and the same for UART_RXD on PIN_B25

any help on how to resolve this issue would be appreciated

Cheers

[sstrell]

Can you show your settings in the HPS IP Parameter Editor and Pin Planner?  The HPS has to be set up to use those pins for a function like UART.

[JuiceG]

Hey sstrell,

Sorry but I am a new to implementing this kind of thing, I did not set up an HPS ip core.

when looking at the hard processor components, how do I know which one I need to use?

Also the ip cores have significantly more inputs than I was expecting, is there a good tutorial video or any documentation I can reference to get this set up?

Cheers

[sstrell]

If you are not using the HPS, then the problem is most likely that you've selected pins that are dedicated to the HPS so you would need to use the HPS to access the HPS's UART peripheral and that means implementing it in Platform Designer.  If you are not going to use the HPS, you'll need to create a UART design in the FPGA fabric and select unused (but accessible on the dev kit) pins to connect it to.

[JuiceG]

I see, thank you.
I am currently using pins dedicated to the hps although the plan is to not use the hps.
I do not have anything to connect the DE1 board to a pc using the external pins but I have access to a DE2 board. Do you know if the DB9 port goes through hps?
Cheers

[mabdrahi]

Hi Justin,

I will go thorough your query and will back soon

May i have your design reference like rocketboard link?

Thank you,

[mabdrahi]

Hi Justin,

The DB9 on the board is connected to dedicated pins. 

I guess its cannot be change. I suggest you to use GHRD as a referral to your project for uart rs232 with the DB9 header.

Thank you,

Aliff

[mabdrahi]

Hi Justin,

Any update from you?

Thank you,

Aliff

[mabdrahi]

Hi Justin,

As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

Thank you,

Aliff