Master CGB dynamic reconfiguration

[dncmrc]

Hi,

The Arria10 TX transceiver (in Basic, Enhanced PCS mode) can have its PMA interface width dynamically reconfigured (e.g. from 40 to 32 bits). I know how to do that and it's working fine.

My problem is that I am using bonding. The fPLL generating the x6 bonding clocks for the TX transceiver has a Master CGB "PMA Interface Width" setting too. And that must match the PMA width used in the transceiver otherwise the TX will not work (tested and it really doesn't work).

How can I dynamically reconfigure the Master CGB PMA Interface Width? Is there a particular register to do that? At which address?

Thanks!

[CheePin_C_Intel · Accepted solution]

Hi,

As I understand it, you have some inquiries related to the Master CGB PMA interface width reconfiguration. For your information, as I understand it from the A10 XCVR PHY user guide, it seems like the master CGB reconfiguration is not supported. I have also crossed check with ATX PLL Reconfiguration Profiles and verified that this MCGB PMA interface width must be the same for different profiles. Sorry for the inconvenience.

You might need to look into non-bonded mode if you would like to perform the PMA interface width reconfiguration.

Please let me know if there is any concern. Thank you. 

Best regards,

Chee Pin

[dncmrc]

Thanks Chee Pin. I disabled bonding and got rid  of the issue. I think this is a problem for protocols like DisplayPort which do require bonding.

Regards,

Marco

[CheePin_C_Intel]

Hi,

Thanks for the update. I believe the initial inquiry has been addressed. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.