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Max 10 CRC Error Detection Register Access

Altera_Forum
Honored Contributor II
‎02-06-2017 08:24 PM
2,141 Views

The Max 10 (10M08SAE144C8G) has a built in configuration CRC checker. As part of that it has a stored CRC value that it compares against a computed value on power-up. I'd like to access both the stored and computed value from outside the FPGA. From the documentation I've read ("MAX 10 FPGA Device Architecture") it seems like this should be possible. I can't quite figure out how to access these registers from within the HDL. Is there anybody out there who has done this before and can point me in the right direction?

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Altera_Forum
Honored Contributor II
‎02-07-2017 09:11 AM
1,349 Views

There's nothing stated about user accessible registers in the said documentation (=a feature to access the crc logic from FPGA fabric). If there are any (unlikely), they are undocumented.

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