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Hi,
Could someone please explain the difference in performance between the low-speed and high-speed Max 10 I/O pins? I have searched the datasheet and have not be able to readily find the difference. Can the low-speed pins be used to interface to SDR SDRAM at 150MHz. Cheers- Tags:
- Intel® MAX® 10 FPGAs
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Hi,
there does not seem to be any information in the Max 10 user guide, but in the datasheet. Please note that those are two different documents :-) older devices, e.g. Cyclone II, combined those two documents in a single PDF, but Altera seems to split their documents into a handbook/uiserguide and a datasheet lately. The datasheet (https://documentation.altera.com/#/link/mcn1397700832153/mcn1397643748870 (https://documentation.altera.com/#/link/mcn1397700832153/mcn1397643748870)) says hat the low-speed pins support data rates up to 300 Mbps, whereas the high-speed pins support up to 310 Mbps (please double-check against your specific requirements, as the datasheet is in fact a bit more complicated, depending on the I/O standard you use). Best regards, GooGooCluster- Mark as New
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--- Quote Start --- Hi, there does not seem to be any information in the Max 10 user guide, but in the datasheet. Please note that those are two different documents :-) older devices, e.g. Cyclone II, combined those two documents in a single PDF, but Altera seems to split their documents into a handbook/uiserguide and a datasheet lately. The datasheet (https://documentation.altera.com/#/link/mcn1397700832153/mcn1397643748870 (https://documentation.altera.com/#/link/mcn1397700832153/mcn1397643748870)) says hat the low-speed pins support data rates up to 300 Mbps, whereas the high-speed pins support up to 310 Mbps (please double-check against your specific requirements, as the datasheet is in fact a bit more complicated, depending on the I/O standard you use). Best regards, GooGooCluster --- Quote End --- Sorry for necro, but saw an inaccurate post that needed correcting. :nerd: I am trying to determine specifications for my client who will be using the MAX 10 in a prototype board. My research found no specification on low-speed I/O capability from Intel/Altera. According to that datasheet linked by GooGooCluster it speaks ONLY to the HIGH-SPEED I/O pins as up to 300Mbps (LVDS/PPDS/RSDS)...and only in terms of transmitting (output)... very odd. There is not a word on specific I/O data/clock rate limits for low-speed pins (bank1/8). Just looking at the datasheet, if the high-speed is limited to 300 MHz, one can only assume that the low-speed would be less than that. IMO 150 Mbps/MHz is a reasonable limit for low-speed if high-speed is 300. Being that it's been over 2 years since OP posted, I would estimate they were successful in their application. If anyone has any benchmark data for the Max10 low-speed pins (ideally 10M08 but any 10MXX should give me an indication of limits) and is willing to share, they would be showered with appreciation for contributing here. Please and thank you.
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I don't think that the old post is inaccurate. The quoted 310 versus 310 Mbps numbers are correctly quoted from the datasheet.
--- Quote Start --- one can only assume that the low-speed would be less than that. IMO 150 Mbps/MHz is a reasonable limit for low-speed if high-speed is 300. --- Quote End --- You probably miss the important point. It's so that so called "low-speed" pins don't support certain IO standards at all, e.g. no true LVDS. The speed difference for the supported IO standards is almost negligible.- Mark as New
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--- Quote Start --- I don't think that the old post is inaccurate. The quoted 310 versus 310 Mbps numbers are correctly quoted from the datasheet. You probably miss the important point. It's so that so called "low-speed" pins don't support certain IO standards at all, e.g. no true LVDS. The speed difference for the supported IO standards is almost negligible. --- Quote End --- Sorry I think you missed my point, that GooGooCluster misquoted and said that low-speed pins support data rates up to 300 Mbps... where in the documentation does it say that? I read through several times and it *exclusively* lists high-speed transmitting specifications.. making the assumption that the slowest max speed listed under the heading "High-Speed I/O Specifications" is the low-speed limit seems a bit too much of a stretch. No need to interpolate guys, stick to facts.
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It appears to be the maximum delay that you can add to input and output.
I've only found documentation[1] for it on Stratix III, but I guess it's similar on MAX 10.
According to the MAX 10 datasheet[2], minimum offset is always zero, and the maximum offset is small in the fast corner, and large in the slow corner. If you need fast I/O, it should not matter which pins you use.
[1] https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/an474.pdf

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