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Max10 On-Chip-Flash/Dual Configuration Unconstrained Clocks

Altera_Forum
Honored Contributor II
‎09-13-2016 09:42 AM
1,461 Views

Hi, 

 

I'm using altera_dual_boot and altera_onchip_flash in a MAX10M08DAF256C8G with Quartus Prime Lite 15.1.0. 

In TimeQuest I get the followed messages: 

 

Node: ...|altera_onchip_flash_onchip_flash|altera_onchip_flash_avmm_data_controller:avmm_data_controller|read_state.READ_STATE_SETUP was determined to be a clock but was found without an associated clock assignment. 

Register ...|altera_onchip_flash_onchip_flash|altera_onchip_flash_block:altera_onchip_flash_block|ufm_block~XE_YE_TO_SE_FF is being clocked by ...|altera_onchip_flash:onchip_flash|altera_onchip_flash_avmm_data_controller:avmm_data_controller|read_state.READ_STATE_SETUP 

 

Node: ...|altera_dual_boot:dual_boot|alt_dual_boot_avmm:alt_dual_boot_avmm_comp|alt_dual_boot:alt_dual_boot|ru_clk was determined to be a clock but was found without an associated clock assignment. 

Register ...|altera_dual_boot:dual_boot|alt_dual_boot_avmm:alt_dual_boot_avmm_comp|alt_dual_boot:alt_dual_boot|ru_regout is being clocked by ...|altera_dual_boot:dual_boot|alt_dual_boot_avmm:alt_dual_boot_avmm_comp|alt_dual_boot:alt_dual_boot|ru_clk 

 

Are there any solutions to constrain the signals and avoid this messages? 

 

Thanks and best regards 

Guenter
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Altera_Forum
Honored Contributor II
‎09-14-2016 01:35 PM
634 Views

Is your .sdc file simply out of date? Have you updated your design but not reflected the changes in the timing constraints file? 

 

Cheers, 

Alex
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