Max10 Programming with daul boot image

[Evan_shih]

Dear Intel

I've compiled my project which has dual compressed image in it.
Also import two different .sof (07 and 08)  in Page0 and Page1 respectively to convert an .pof file. 

While I select the  CFM0 only under Program/Configure in programmer tools , is it only programs Page0's image or it programs Page0 and Page1 in CFM0 at the same time? 

Thanks!

[Fakhrul]

Hi Evan_shih,

Only Image 0 will be programmed if you check the CFM0. Unless you check for both CFM0 and CFM1. Kindly refer to the following table

from Intel® MAX® 10 FPGA Configuration User Guide

Regards,

Fakhrul

[Evan_shih]

Dear Fakhrul

As you metion , Only Image 0 will be programmed if I check the CFM0.

There is another question ,  what is Image 0 stands for ?
Is it stands for an .pof which convert by two .sof (07 and 08 ) or it stands for an sof ( 07 ) only ?

Thanks for your relay. 
Evan

[FvM]

Hi,
you definitely should review the above mentioned configuration user guide. It clarifies about flash memory utilisation in dual boot configuration. CFM1 in Quartus Programmer stands for CFM1 + CFM2. 

Page0/CFM0 is usually the factory image in a RSU configuration, Page1/CFM1 the application image. 

Regards
Frank

[Evan_shih]

Dear Frank

Thanks for your reply.

Yes, I've study the configuration user guide already. 

According to Onchip flash IP setting on my design to compare the table you post and also the user guilde's change list the Image 2 should stands for CFM1 and Image1 should stands for CFM0 , right ?

Here is the question , if I only select CFM0 under Program/Configure in programming tool. It should be programmed image0(Page0) into the Flash.
While I earsed the CFM0 by programming tool it should not have any logic implement in next AC power on.
But result shows Image1(Page1)  instead.

It was confused me that is only Image1( Page1) 's sof exist in CFM1 ?

P.S. I've eraserd CFM0/CFM1/UFM before programming CFM0 only .

Thanks!
Evan.

.

[Fakhrul]

Hi Evan_shih,

My apologies as I have overlooked your comment. Yes, you are right,  if CFM0 is erased, the FPGA will attempt to load the configuration from CFM1 (image 1) instead.

Regards,

Fakhrul

[Fakhrul · Accepted solution]

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