Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Micron Active Serial Configuration Arria 10

LFrin
New Contributor I
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In our design we use a NOR Flash memory from Micron (MT25QU01GBBB8E12-0SIT) as configuration device and the FPGA Arria 10 (10AX027E4F29E3SG). We write to the Flash via the FPGA using a .jic file.

The direct programming of the FPGA via .sof file as well as writing to the flash memory works fine. All signals look good on the oscilloscope. The powerup sequencing works fine. And the FPGA configures automatically after reboot.

From time to time you can observe the error that the FPGA does not load its configuration from the flash after disconnecting and reconnecting the power supply. And that also doesn't work anymore if you reboot the FPGA again.

If you re-program the flash everything works and the FPGA configures automatically after a restart.

I read the .jic file from the flash memory (Examine) of a board on which the FPGA did not configure itself. Compared to the original programming file, there are many errors in the data.

Unfortunately I do not know how to isolate the error. It feels like the flash is corrupt. But nothing writes to the flash and the power supply looks good.

Does anyone have any idea what this could be?

 

P.S.:

Some more infos:

MSEL[2...0] Pins:    011    AS (x1 and x4) Standard POR

nSTATUS Pin is toggling between high and low with a periode of 3 ms.

We use AS x4 with a slow 12.5 MHz Internal Oscillator as Active serial clock.

We use compressed bitstreams.

All unused Pins are reserved as output driving ground.

 

 

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LFrin
New Contributor I
816 Views

Hello, the bug hasn't occured since.

I noticed that it only happened when my colleague accesses the FPGA with the debugger. Somehow something must have gone wrong with the Flash-IP in our Design and the Quartus Debugging tools.

Now the FPGA works as planned and configures itself without problems.

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YuanLi_S_Intel
Employee
862 Views

From your description, it seems like the hardware connection between JTAG to FPGA and also FPGA to flash memory has no issue as you were able to program both JIC and SOF into it.


It seems like the issue is more on the memory, can you try to swap the memory with a known good memory?


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LFrin
New Contributor I
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The strange thing is; If you reprogram the memory after the error occurred, configuring from the flash memory at boot up works again. We have rewritten the flash memory of our three prototypes and are currently waiting for one of them not being configured at startup.

We are still working on the firmware and we are using many debugging features via JTAG and SignalTap. Is there any possibility to write to the flash memory by mistake?

Unfortunately we do not have the possibility to swap the memory here. We would have to have our circuit board maker do it.

 

 

 

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LFrin
New Contributor I
817 Views

Hello, the bug hasn't occured since.

I noticed that it only happened when my colleague accesses the FPGA with the debugger. Somehow something must have gone wrong with the Flash-IP in our Design and the Quartus Debugging tools.

Now the FPGA works as planned and configures itself without problems.

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