Mixing byte addressable and word addressable memories in a design

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

Mixing byte addressable and word addressable memories in a design

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I have a design with several byte addressable memories and also several word addressable memories. When I don't check the "read memory as byte addressable", I get warnings for the byte addressable memories that they have been read as word addressable and the opposite when I check it (warnings for word addressable memories read as byte addressable). Is this a problem? Is there any way to resolve this correctly?

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