Number of times can be programmed (erase/write) altera chips

[Altera_Forum]

Greetings. I have some development boards, Cyclone, Max.. and I'll buy some chips, as the attachment, by example... They can be of different types or performance, I want to experiment and make some custom development cards. By example some microchip microcontrollers support, in theory:  

 100,000 erase/write cycle enhanced flash program memory typical  1,000,000 erase/write cycle data eeprom  and memory typical data eeprom retention > 40 years.   My question is: Number of times can be programmed (erase/write) from quartus, the altera chips? in general, not specific.   Thanks.

[Altera_Forum]

Hi bashman, 

according to the actual device specification for Altera MAX3000A (EPM3064A TC44-10N) the programming or erase cycle count is 100. A fragment from the mentioned device specification, https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/ds/m3000a.pdf: "The devices can be reprogrammed for quick and efficient iterations during design development and debugging cycles, and can be programmed and erased up to 100 times."  The following web page contains some interesting information as well, http://dangerousprototypes.com/blog/2011/07/30/cpld-flash-memory-write-cycles/  Best regards, Martin

[Altera_Forum]

--- Quote Start ---   "The devices can be reprogrammed for quick and efficient iterations during design development and debugging cycles, and can be programmed and erased up to 100 times." The following web page contains some interesting information as well, http://dangerousprototypes.com/blog/2011/07/30/cpld-flash-memory-write-cycles/ Martin  --- Quote End ---    Bad for me. :( In my country is very difficult to find usd dollars, for buy.   I with an mcu, working on some project, researching or testing, I program at least 10 times in one day. xD  Then, more hours in the simulator, and fewer hours in practice.

[Altera_Forum]

The question makes only sense for flash based programmable logic devices, e.g. various MAX types and configuration flash memory, not for FPGA with external configuration memory. 

 Modern MAX10 devices are e.g. specified with 10000 erase and reprogram cycles, which is surely sufficient for configuration memory and most user flash memory applications. But it suggests to avoid permanent rewriting of user flash content.