OneAPI Devcloud FPGA hardware issues (stratix10 node) (Invalid Binary)

[Wei-Chih]

Hello support team

When I used qsub -l nodes=1:fpga_runtime:stratix10:ppn=2 -d . run_fpga_hw.sh command to run my code on devcloud stratix10, it get the error as below:

terminate called after throwing an instance of 'cl::sycl::runtime_error'
what(): Native API failed. Native API returns: -42 (CL_INVALID_BINARY) -42 (CL_INVALID_BINARY)
make: *** [run_hw] Aborted  

After I search this issue of devcloud stratix10, it might relate to FPGA Board Initialization, right? According to https://community.intel.com/t5/Intel-DevCloud/Invalid-Binary-for-FPGA-Stratix-10-Nodes/m-p/1300748#M2604  and   https://www.intel.com/content/www/us/en/develop/documentation/oneapi-programming-guide/top/programming-interface/fpga-flow/fpga-bsps-and-boards/fpga-board-initialization.html     

it seems i need to do Initialization if i want to use stratix10. if my understanding is right, can you teach me how to modify my makefile.fpga ? if not, please tell me how to solve it.

below is my makefile.fpga content, can you teach me how to add stratix initialization into my  makefile.fpga

CXX := dpcpp
CXXFLAGS = -O2 -g -std=c++17

SRC := kernel.cpp

.PHONY: fpga_emu run_emu clean

fpga_emu: kernel.fpga_emu

hw: kernel.fpga

report: kernel_report.a

kernel.fpga_emu: $(SRC)
$(CXX) $(CXXFLAGS) -fintelfpga $^ -o $@ -DFPGA_EMULATOR=1

a.o: $(SRC)
$(CXX) $(CXXFLAGS) -fintelfpga -c $^ -o $@ -DFPGA=1

kernel.fpga: a.o
$(CXX) $(CXXFLAGS) -fintelfpga $^ -o $@ -Xshardware

run_emu: kernel.fpga_emu
./kernel.fpga_emu 

run_hw: kernel.fpga
./kernel.fpga 

dev.o: $(SRC)
$(CXX) $(CXXFLAGS) -fintelfpga -c $^ -o $@ -DFPGA=1

kernel_report.a: dev.o
$(CXX) $(CXXFLAGS) -fintelfpga -fsycl-link $^ -o $@ -Xshardware

clean:
rm -rf *.o *.d *.out *.mon *.emu *.aocr *.aoco *.prj *.fpga_emu *.fpga_emu_buffers kernel.fpga *.a

 

[hareesh]

Hi Wei-Chih,

We found two issues with your name but different case numbers.

1. OneAPI Devcloud FPGA hardware issues (stratix 10 node) (Invalid Binary)
2. DecCloud FPGA hardware issues

Can you please confirm to me that both are the same issues or different?

and please share your code.

thanks,

[Wei-Chih]

Hi hareesh

right, they are same issues, but a little different. In the beginning both arria10 and stratix10 have -42 (CL_INVALID_BINARY)  error, but after i tried modified work group size(decrease), I found arria10 can run with slow execution time. However,  stratix10 was still fail in any conditions. Could you help check this issue?

attached is my code

By the way, I have another question. In my code, if i want to modify lambda function from h.parallel_for to h.single_task, can you teach how to modify it? Cause i wanna run it on fpga hw.

If it can be modified to h.single_task, I need to use nd_item<1> class, but it seems h.single_task cannot pass parameter. So how can i modify it?

[hareesh]

HI @Wei-Chih,

Did you tried this

BSP loaded on device was pac_s10_usm, designs compiled for pac_s10.

To switch BSPs:

aocl initialize acl0 pac_s10_usm or 

aocl initialize acl0 pac_s10

See for further details: https://software.intel.com/content/www/us/en/develop/documentation/oneapi-programming-guide/top/prog...