Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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PFL update issues

Altera_Forum
Honored Contributor II
‎03-19-2018 10:34 AM
1,256 Views

Hi,  

I am trying to generate a system with a Max II CPLD with a PFL instantiated on it and a Cyc V being loaded by it over PS configuration scheme. I am able to successfully program flash with my POF over JTAG with the Quartus programmer. In my POF are two pages, each loading the Cyc V, one that acts as a bootloader and one that acts as the application code.  

 

I need to be able to update the application code using the flash programmer in my bootloader code, which I know works. What I can't seem to find out is the file type I need to program the flash with to get something that the PFL recognises. I have checked the output at the application location from the PFL and have found it is similar to the RBF format but not similar enough that the change can easily be manually done.  

 

I am looking for help in identifying the file type I need to program the flash with to update just my application image and not using JTAG. Any pointers to some better information than the Altera ANs would also be appreciated. 

 

Many Thanks!!!
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Altera_Forum
Honored Contributor II
‎03-19-2018 04:09 PM
323 Views

RESOLVED! 

 

Found this old thread https://www.alteraforum.com/forum/showthread.php?t=28657 that explains how to obtain the rbf file type with the correct additional bytes, must have missed it by just not managing to search the right terms before.  

 

Convoluted way to get the necessary file but likely could be put into a bash script for ease, especially when needing to carve off certain sections!
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